Invention Grant
- Patent Title: Breakdown voltage multiplying integration scheme
- Patent Title (中): 击穿电压倍增积分方案
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Application No.: US14732680Application Date: 2015-06-06
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Publication No.: US09478651B2Publication Date: 2016-10-25
- Inventor: Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotkowski Safran Cole & Calderon P.C.
- Agent Yuanmin Cai; Andrew M. Calderon
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/778 ; H01L27/088 ; H01L21/8252 ; H01L27/06 ; H01L27/095 ; H01L29/872 ; H01L29/205 ; H01L29/66 ; H01L21/683 ; G06F17/50 ; H01L29/20 ; H01L29/40

Abstract:
A circuit includes a first field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal; and a second field effect transistor having a gate, a first drain-source terminal, and a second drain-source terminal. The second field effect transistor and the first field effect transistor are of the same type, i.e., both re-channel transistors or both p-channel transistors. The second drain-source terminal of the first field effect transistor is coupled to the first drain-source terminal of the second field effect transistor; and the gate of the second field effect transistor is coupled to the first drain-source terminal of the second field effect transistor. The resulting three-terminal device can be substituted for a single field effect transistor that would otherwise suffer breakdown under proposed operating conditions.
Public/Granted literature
- US20150270380A1 BREAKDOWN VOLTAGE MULTIPLYING INTEGRATION SCHEME Public/Granted day:2015-09-24
Information query
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