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公开(公告)号：US09224830B2
公开(公告)日：2015-12-29
申请号：US13914713
申请日：2013-06-11
Inventor： Seong-Il Kim , Jong-Won Lim , Dong Min Kang , Sang-Heung Lee , Hyung Sup Yoon , Chull Won Ju , Byoung-Gue Min , Jongmin Lee , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L29/812 , H01L29/66 , H01L29/40 , H01L29/41 , H01L29/423 , H01L29/778 , H01L29/16 , H01L29/20
CPC classification number: H01L29/66477 , H01L29/1608 , H01L29/2003 , H01L29/40 , H01L29/401 , H01L29/402 , H01L29/41 , H01L29/42312 , H01L29/42316 , H01L29/42376 , H01L29/66462 , H01L29/7787 , H01L29/812
Abstract: A field effect transistor is provided. The transistor may include a source electrode and a drain electrode provided spaced apart from each other on a substrate and a ‘+’-shaped gate electrode provided on a portion of the substrate located between the source and drain electrodes.
Abstract translation: 提供场效应晶体管。 晶体管可以包括在基板上彼此间隔开设置的源电极和漏电极，以及设置在位于源极和漏极之间的基板的一部分上的“+”形栅电极。
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公开(公告)号：US08901608B2
公开(公告)日：2014-12-02
申请号：US13908076
申请日：2013-06-03
Inventor： Jong-Won Lim , Hokyun Ahn , Woojin Chang , Dong Min Kang , Seong-Il Kim , Sang-Heung Lee , Hyung Sup Yoon , Chull Won Ju , Hae Cheon Kim , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L33/00 , H01L29/66 , H01L29/778
CPC classification number: H01L29/778 , H01L29/402 , H01L29/42316 , H01L29/66431
Abstract: A high electron mobility transistor includes a T-type gate electrode disposed on a substrate between source and drain electrodes and insulating layers disposed between the substrate and the T-type gate electrode. The insulating layers include first, second, and third insulating layers. The third insulating layer is disposed between the substrate and a head portion of the T-type gate electrode such that a portion of the third insulating layer is in contact with a foot portion of the T-type gate electrode. The second insulating layer is disposed between the substrate and the head portion of the T-type gate electrode to be in contact with the third insulating layer. The first insulating layer and another portion of the third insulating layer are sequentially stacked between the substrate and the head portion of the T-type gate electrode to be in contact with the second insulating layer.
Abstract translation: 高电子迁移率晶体管包括设置在源极和漏极之间的衬底上的T型栅电极和设置在衬底和T型栅电极之间的绝缘层。 绝缘层包括第一绝缘层，第二绝缘层和第三绝缘层。 第三绝缘层设置在基板和T型栅电极的头部之间，使得第三绝缘层的一部分与T型栅极的脚部接触。 第二绝缘层设置在基板与T型栅电极的头部之间以与第三绝缘层接触。 所述第一绝缘层和所述第三绝缘层的另一部分依次层叠在所述基板与所述T型栅电极的头部之间，以与所述第二绝缘层接触。
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公开(公告)号：US09837719B2
公开(公告)日：2017-12-05
申请号：US15229891
申请日：2016-08-05
Inventor： Dong-Young Kim , Dong Min Kang , Seong-Il Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Ho Kyun Ahn , Hyung Sup Yoon , Sang-Heung Lee , Jong Min Lee , Jong-Won Lim , Yoo Jin Jang , Hyun Wook Jung , Kyu Jun Cho , Chull Won Ju
CPC classification number: H01Q9/0407 , H01Q1/50 , H01Q9/0442
Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the multilayered substrate.
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公开(公告)号：US08937002B2
公开(公告)日：2015-01-20
申请号：US14230031
申请日：2014-03-31
Inventor： Sung Bum Bae , Eun Soo Nam , Jae Kyoung Mun , Sung Bock Kim , Hae Cheon Kim , Chull Won Ju , Sang Choon Ko , Jong-Won Lim , Ho Kyun Ahn , Woo Jin Chang , Young Rak Park
IPC: H01L21/20 , H01L29/66 , H01L21/8252 , H01L27/06 , H01L27/088 , H01L21/02
CPC classification number: H01L29/66446 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02647 , H01L21/8252 , H01L27/0605 , H01L27/0883
Abstract: The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.
Abstract translation: 本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可通过再生技术在同一衬底上实现各种氮化物一体化结构（ 用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG） 。
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公开(公告)号：US20140152338A1
公开(公告)日：2014-06-05
申请号：US13950939
申请日：2013-07-25
Inventor： Jongmin LEE , Byoung-Gue Min , Chull Won Ju
IPC: G01R31/26
CPC classification number: G01R31/2608 , G01R31/2621 , G01R31/2632
Abstract: Provided is a low-cost and high-efficient system for measuring reliability of an electronic device. According to the present invention, a single input power source for applying power to an input terminal of a plurality of electronic device samples and a single output power source for applying power to an output terminal of the plurality of electronic device samples are provided. Further, an input switch having first switches of which the number corresponds to the number of the plurality of electronic device samples, the input switch being installed between the input power source and the input terminal so that the first switches are selectively switched to apply input power; and an output switch having second switches of which the number corresponds to the number of the plurality of electronic device samples, the output switch being installed between the output power source and the output terminal so that the second switches are selectively switched to apply output power are provided.
Abstract translation: 提供了用于测量电子设备的可靠性的低成本和高效率的系统。 根据本发明，提供了用于向多个电子设备样本的输入端施加电力的单个输入电源和用于向多个电子设备样本的输出端施加电力的单个输出电源。 此外，具有第一开关的输入开关，其数量对应于多个电子设备样本的数量，输入开关安装在输入电源和输入端子之间，使得第一开关被选择性地切换以施加输入功率 ; 以及具有第二开关的输出开关，其数量对应于多个电子设备样本的数量，输出开关安装在输出电源和输出端子之间，使得第二开关选择性地切换以施加输出功率 提供。
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Patent Agency Ranking
公开(公告)号：US20130169365A1
公开(公告)日：2013-07-04
申请号：US13670016
申请日：2012-11-06
Inventor： Sang-Heung LEE , Seong-Il Kim , Dong Min Kang , Jong-Won Lim , Hyung Sup Yoon , Chull Won Ju , Jae Kyoung Mun , Eun Soo Nam
IPC: H03G3/00
CPC classification number: H03G1/0082 , H03G1/0088 , H03G3/3084
Abstract: Disclosed is an automatic gain control feedback amplifier that can arbitrarily control a gain even when a difference in input signal is large. The automatic gain control feedback amplifier includes: an amplification circuit unit configured to amplify voltage input from an input terminal and output the amplified voltage to an output terminal; a feedback circuit unit connected between the input terminal and the output terminal and including a feedback resistor unit of which a total resistance value is determined by one or more control signals and a feedback transistor connected to the feedback resistor unit in parallel; and a bias circuit unit configured to supply predetermined bias voltage to the feedback transistor.
Abstract translation: 公开了一种自动增益控制反馈放大器，即使当输入信号的差异大时也可以任意地控制增益。 自动增益控制反馈放大器包括：放大电路单元，被配置为放大从输入端输入的电压，并将放大的电压输出到输出端; 连接在输入端子和输出端子之间的反馈电路单元，包括反馈电阻器单元，其总电阻值由一个或多个控制信号确定，反馈晶体管并联连接到反馈电阻器单元; 以及偏置电路单元，被配置为向所述反馈晶体管提供预定的偏置电压。
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7.发明授权公开(公告)号：US09438199B2
公开(公告)日：2016-09-06
申请号：US14478295
申请日：2014-09-05
Inventor： Dong Min Kang , Seong Il Kim , Sang Heung Lee , Chull Won Ju , Ho Kyun Ahn , Hyung Sup Yoon , Jong Won Lim
CPC classification number: H03H7/38 , H01L23/642 , H01L2224/49175 , H01P1/2039 , H01P5/12 , H05K1/025 , H05K2201/09781
Abstract: Provided herein is a component package including a matching unit and a matching method thereof, the matching unit including: a substrate; a transmission line formed on the substrate, the transmission line being connected to a terminal of the component package; a bonding wire electrically connecting the transmission line and a central component; and a capacitor unit having a plurality of capacitors electrically connected with the transmission line by wiring connection, wherein an inductance of the matching unit is variable by adjusting a length of the bonding wire, and a capacitance of the matching unit is variable by increasing or reducing the number of capacitors electrically connected to the transmission line, of among the capacitors inside the capacitor unit, by extending or cutting off the wiring connection.
Abstract translation: 本文提供了一种包括匹配单元及其匹配方法的组件封装，所述匹配单元包括：衬底; 形成在所述基板上的传输线，所述传输线连接到所述部件封装的端子; 电连接所述传输线和中心部件的接合线; 以及具有通过布线连接与传输线电连接的多个电容器的电容器单元，其中匹配单元的电感通过调整接合线的长度而变化，并且匹配单元的电容可通过增加或减小而变化 通过延长或切断布线连接，在电容器单元内的电容器之间电连接到传输线的电容器的数量。
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公开(公告)号：US20140184333A1
公开(公告)日：2014-07-03
申请号：US13950895
申请日：2013-07-25
Inventor： Sang-Heung LEE , Seong-il Kim , Dong Min Kang , Jong-Won Lim , Chull Won Ju , Hyung Sup Yoon , Jae Kyoung Mun , Eun Soo Nam
IPC: H03G3/30
CPC classification number: H03F3/08 , H03G1/0047 , H03G1/0088 , H03G3/02 , H03G3/3084 , H03G11/02
Abstract: Provided is a feedback amplifier. The feedback amplifier includes: an amplification circuit unit amplifying a bust packet signal inputted from an input terminal and outputting the amplified voltage to an output terminal; a feedback circuit unit disposed between the input terminal and the output terminal and controlling whether to apply a fixed resistance value to a signal outputted to the output terminal; a packet signal detection unit detecting a peak value of a bust packet signal from the output terminal and controlling whether to apply the fixed resistance value; and a bias circuit unit generating a bias voltage, wherein the feedback circuit unit determines a feedback resistance value to change the fixed resistance value in response to at least one control signal and adjusts a gain by receiving the bias voltage.
Abstract translation: 提供反馈放大器。 反馈放大器包括：放大电路单元，放大从输入端子输入的突发分组信号，并将放大的电压输出到输出端子; 反馈电路单元，设置在所述输入端子和所述输出端子之间，并且控制是否对输出到所述输出端子的信号施加固定电阻值; 分组信号检测单元，检测来自输出端的突发分组信号的峰值，并控制是否施加固定电阻值; 以及产生偏置电压的偏置电路单元，其中所述反馈电路单元确定反馈电阻值以响应于至少一个控制信号改变所述固定电阻值，并且通过接收所述偏置电压来调整增益。
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公开(公告)号：US20140167175A1
公开(公告)日：2014-06-19
申请号：US13914713
申请日：2013-06-11
Inventor： Seong-Il KIM , Jong-Won Lim , Dong Min Kang , Sang-Heung Lee , Hyung Sup Yoon , Chull Won Ju , Byoung-Gue Min , Jongmin Lee , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L27/088 , H01L29/66
CPC classification number: H01L29/66477 , H01L29/1608 , H01L29/2003 , H01L29/40 , H01L29/401 , H01L29/402 , H01L29/41 , H01L29/42312 , H01L29/42316 , H01L29/42376 , H01L29/66462 , H01L29/7787 , H01L29/812
Abstract: A field effect transistor is provided. The transistor may include a source electrode and a drain electrode provided spaced apart from each other on a substrate and a ‘+’-shaped gate electrode provided on a portion of the substrate located between the source and drain electrodes.
Abstract translation: 提供场效应晶体管。 晶体管可以包括在基板上彼此间隔开设置的源电极和漏电极，以及设置在位于源极和漏极之间的基板的一部分上的“+”形栅电极。
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公开(公告)号：US20140159050A1
公开(公告)日：2014-06-12
申请号：US13935096
申请日：2013-07-03
Inventor： Hyung Sup YOON , Byoung-Gue Min , Jong-Won Lim , Hokyun Ahn , Seong-ll Kim , Sang-Heung Lee , Dong Min Kang , Chull Won Ju , Jae Kyoung Mun
IPC: H01L29/778 , H01L29/66
CPC classification number: H01L29/66462 , H01L21/02118 , H01L21/0217 , H01L21/02178 , H01L21/0254 , H01L21/28264 , H01L21/28593 , H01L21/31111 , H01L21/31144 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/404 , H01L29/42316 , H01L29/42376 , H01L29/778 , H01L29/7786
Abstract: A field effect transistor is provided. The field effect transistor may include a capping layer on a substrate, a source ohmic electrode and a drain ohmic electrode on the capping layer, a first insulating layer and a second insulating layer stacked on the capping layer to cover the source and drain ohmic electrodes, a Γ-shaped gate electrode including a leg portion and a head portion, the leg portion being connected to the substrate between the source ohmic electrode and the drain ohmic electrode, and the head portion extending from the leg portion to cover a top surface of the second insulating layer, a first planarization layer on the second insulating layer to cover the Γ-shaped gate electrode, and a first electrode on the first planarization layer, the first electrode being connected to the source ohmic electrode or the drain ohmic electrode.
Abstract translation: 提供场效应晶体管。 场效应晶体管可以包括衬底上的覆盖层，覆盖层上的源欧姆电极和漏极欧姆电极，堆叠在覆盖层上以覆盖源极和漏极欧姆电极的第一绝缘层和第二绝缘层， 包括脚部和头部的栅格电极，所述脚部分连接到所述源欧姆电极和所述漏极欧姆电极之间的衬底，并且所述头部从所述腿部延伸以覆盖所述源极欧姆电极和所述漏极欧姆电极的顶表面 所述第二绝缘层，在所述第二绝缘层上覆盖所述栅格电极的第一平坦化层和所述第一平坦化层上的第一电极，所述第一电极连接到所述源欧姆电极或所述漏极欧姆电极。
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