公开(公告)号：US20190253030A1

公开(公告)日：2019-08-15

申请号：US15977739

申请日：2018-05-11

Applicant: Analog Devices Global Unlimited Company

Inventor： Yalcin Alper Eken

IPC: H03G1/00 ,  H03F3/08 ,  G01S17/89

CPC classification number: H03G1/0082 ,  G01S17/89 ,  H03F3/087

Abstract: Aspects of this disclosure relate to a receiver for a light detection and ranging system. The receiver includes a transimpedance amplifier that is operable in a linear mode for a range of power of light received by the receiver. The receiver can provide information about amplitude of the light outside of the range of power of the light for which the transimpedance amplifier operates in the linear mode. This information can be useful, for example, in identifying an object from which light received by the receiver was reflected.

公开(公告)号：US20170194911A1

公开(公告)日：2017-07-06

申请号：US14989203

申请日：2016-01-06

Applicant: ANALOG DEVICES GLOBAL

Inventor： Devrim AKSIN

IPC: H03F1/02 ,  H03G3/30 ,  H03F3/45

CPC classification number: H03F3/195 ,  H03F3/245 ,  H03F3/45085 ,  H03F3/45103 ,  H03F2200/513 ,  H03F2203/45458 ,  H03F2203/45496 ,  H03F2203/45701 ,  H03G1/0023 ,  H03G1/0082 ,  H03G1/0088 ,  H03G3/001

Abstract: In high speed communication applications, e.g., optical communication, a variable gain amplifier is used for input signal amplitude normalization or for linear equalization. Traditionally a bipolar Gilbert multiplier circuit is used. When moving towards a low-power application, a modified circuit topology is implemented to reduce the minimum supply voltage requirement of the variable gain amplifier while ensuring that bias current levels remain substantially the same and achieving the same current switching capacity as the traditional circuit. As a result, the power consumption of the circuit can be greatly reduced. The modified circuit topology combines the amplifier and gain transistors and achieves gain programming using a voltage difference of two pairs of floating voltage sources.

公开(公告)号：US09634611B1

公开(公告)日：2017-04-25

申请号：US14929809

申请日：2015-11-02

Applicant: INPHI CORPORATION

Inventor： Ariel Leonardo Vera Villarroel ,  Subramaniam Shankar ,  Steffen O. Nielsen

IPC: H03F3/45 ,  H03F1/02 ,  H03G3/30 ,  H03F3/19

CPC classification number: H03G3/3036 ,  H03F1/0205 ,  H03F1/083 ,  H03F3/19 ,  H03F3/211 ,  H03F3/4508 ,  H03F3/45085 ,  H03F2200/451 ,  H03F2200/91 ,  H03F2203/45458 ,  H03F2203/45496 ,  H03F2203/45644 ,  H03G1/0023 ,  H03G1/0082 ,  H03G5/28

Abstract: A variable gain amplifier having stabilized frequency response for widened gain control range. A resistor-capacitor compensation network is provided between two differential current input ports and corresponding emitter nodes of cross-coupled four transistors in the variable gain amplifier to desensitize the gain control voltages to the system noise and provide compensation to the VGA frequency response when the differential gain control voltage varies the gain setting, yielding a substantially stabilized frequency response over a −3 dB bandwidth ranging from 1 GHz to 60 GHz with a widened gain control range up to 12 dB without increasing power consumption.

公开(公告)号：US09602069B2

公开(公告)日：2017-03-21

申请号：US15254894

申请日：2016-09-01

Applicant: Texas Instruments Incorporated

Inventor： Rajendrakumar Joish

IPC: H04L25/03 ,  H04L27/00 ,  H03K5/02 ,  H03G1/00 ,  H03F3/45 ,  H04B1/10

CPC classification number: H03G1/0082 ,  H03F1/26 ,  H03F3/45085 ,  H03F3/45098 ,  H03F3/72 ,  H03F2200/294 ,  H03F2203/45026 ,  H03F2203/45202 ,  H03F2203/45466 ,  H03F2203/45494 ,  H03F2203/45496 ,  H03F2203/45504 ,  H03F2203/7233 ,  H03G1/0035 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3052 ,  H04B1/1036 ,  H04B1/18

Abstract: The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.

公开(公告)号：US20160087727A1

公开(公告)日：2016-03-24

申请号：US14889127

申请日：2014-05-09

Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

Inventor： Munehiko Nagatani ,  Hideyuki Nosaka ,  Toshihiro Itoh ,  Koichi Murata ,  Hiroyuki Fukuyama ,  Takashi Saida ,  Shin Kamei ,  Hiroshi Yamazaki ,  Nobuhiro Kikuchi ,  Hiroshi Koizumi ,  Masafumi Nogawa ,  Hiroaki Katsurai ,  Hiroyuki Uzawa ,  Tomoyoshi Kataoka ,  Naoki Fujiwara ,  Hiroto Kawakami ,  Kengo Horikoshi ,  Yves Bouvier ,  Mikio Yoneyama ,  Shigeki Aisawa ,  Masahiro Suzuki

IPC: H04B10/54 ,  H03G3/00 ,  H03F3/04 ,  H03F3/60 ,  H03F1/32

CPC classification number: H04B10/541 ,  H03F1/223 ,  H03F1/32 ,  H03F3/04 ,  H03F3/082 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45085 ,  H03F3/45089 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/602 ,  H03F2200/18 ,  H03F2200/219 ,  H03F2200/255 ,  H03F2200/27 ,  H03F2200/336 ,  H03F2200/411 ,  H03F2200/72 ,  H03F2200/75 ,  H03F2203/45258 ,  H03F2203/45374 ,  H03F2203/45392 ,  H03F2203/45454 ,  H03F2203/45466 ,  H03F2203/45471 ,  H03F2203/45486 ,  H03F2203/45496 ,  H03F2203/45504 ,  H03F2203/45506 ,  H03F2203/45702 ,  H03G1/0023 ,  H03G1/0082 ,  H03G1/0088 ,  H03G3/00 ,  H03G3/001 ,  H03G3/3084 ,  H04B10/5561 ,  H04B10/588

Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.

Abstract translation: 光调制器驱动电路（1）包括放大器（50，Q10，Q11，R10-R13）和电流量调节电路（51），能够根据期望的操作调节放大器（50）的电流量 模式。 电流量调节电路（51）包括至少两个根据表示期望的操作模式的二进制控制信号单独地进行ON / OFF控制的电流源（IS10）。

公开(公告)号：US20130169365A1

公开(公告)日：2013-07-04

申请号：US13670016

申请日：2012-11-06

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sang-Heung LEE ,  Seong-Il Kim ,  Dong Min Kang ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Chull Won Ju ,  Jae Kyoung Mun ,  Eun Soo Nam

IPC: H03G3/00

CPC classification number: H03G1/0082 ,  H03G1/0088 ,  H03G3/3084

Abstract: Disclosed is an automatic gain control feedback amplifier that can arbitrarily control a gain even when a difference in input signal is large. The automatic gain control feedback amplifier includes: an amplification circuit unit configured to amplify voltage input from an input terminal and output the amplified voltage to an output terminal; a feedback circuit unit connected between the input terminal and the output terminal and including a feedback resistor unit of which a total resistance value is determined by one or more control signals and a feedback transistor connected to the feedback resistor unit in parallel; and a bias circuit unit configured to supply predetermined bias voltage to the feedback transistor.

Abstract translation: 公开了一种自动增益控制反馈放大器，即使当输入信号的差异大时也可以任意地控制增益。 自动增益控制反馈放大器包括：放大电路单元，被配置为放大从输入端输入的电压，并将放大的电压输出到输出端; 连接在输入端子和输出端子之间的反馈电路单元，包括反馈电阻器单元，其总电阻值由一个或多个控制信号确定，反馈晶体管并联连接到反馈电阻器单元; 以及偏置电路单元，被配置为向所述反馈晶体管提供预定的偏置电压。

公开(公告)号：US07764528B2

公开(公告)日：2010-07-27

申请号：US11862066

申请日：2007-09-26

Applicant: Lance Weston ,  Mark H. Schmidt ,  Tony T. Li

Inventor： Lance Weston ,  Mark H. Schmidt ,  Tony T. Li

IPC: H02M7/02

CPC classification number: H03G1/0082 ,  H03G3/301

Abstract: A half-wave rectifier including an input port for receiving an incoming AC signal, an output port for outputting a half-wave rectified signal, an operational amplifier including inverting and non-inverting input terminals and an output terminal, the inverting input terminal connected to a ground reference and a non-inverting input terminal coupled to a negative feedback loop and a first resistor. The negative feedback loop including a second resistor coupled between a first node and a second node, the first node coupling the output terminal and the output port and the second node coupling the non-inverting input terminal and the second resistor. A capacitor is coupled to the input port and in series with the first resistor.

Abstract translation: 一种半波整流器，包括用于接收输入AC信号的输入端口，用于输出半波整流信号的输出端口，包括反相和非反相输入端子的运算放大器和输出端子，所述反相输入端子连接到 耦合到负反馈回路和第一电阻器的接地参考和非反相输入端子。 负反馈回路包括耦合在第一节点和第二节点之间的第二电阻器，耦合输出端子和输出端口的第一节点和耦合非反相输入端子和第二电阻器的第二节点。 电容器耦合到输入端口并与第一电阻串联。

公开(公告)号：US06351188B1

公开(公告)日：2002-02-26

申请号：US09395542

申请日：1999-09-14

Applicant: Fujii Masahiro

Inventor： Fujii Masahiro

IPC: H03G330

CPC classification number: H03G1/0082

Abstract: A variable gain amplifier circuit includes an emitter-grounded amplifier circuit and an emitter follower connected to the input section of the emitter-grounded amplifier circuit and having a variable output impedance. In a gain control method for the variable gain amplifier circuit, a bias voltage applied to the input section of the emitter-grounded amplifier circuit is kept constant, and the output impedance of the emitter follower is changed to decrease the gain of the emitter-grounded amplifier circuit.

Abstract translation: 可变增益放大器电路包括发射极接地放大器电路和连接到发射极接地放大器电路的输入部分并具有可变输出阻抗的射极跟随器。 在可变增益放大器电路的增益控制方法中，施加到发射极接地放大器电路的输入部分的偏置电压保持恒定，并且改变射极跟随器的输出阻抗，以降低发射极接地 放大电路。

公开(公告)号：US20010033199A1

公开(公告)日：2001-10-25

申请号：US09776672

申请日：2001-02-06

Inventor： Yuuichi Aoki

IPC: H03G003/30

CPC classification number: H03G1/0082

Abstract: A variable-gain circuit includes an amplifying transistor, a first gain control section for receiving a first gain control signal to control the amplifying transistor to have a first gain curve of decibel gain convex toward the bottom of graph, and a second gain control section for receiving a second control signal to control the first transistor to have a second gain curve of decibel gain convex toward the top of graph. The first and second control signals are fed at a time to cancel the non-linearity of the gain curves to have an overall linear gain curve.

Abstract translation: 可变增益电路包括放大晶体管，第一增益控制部分，用于接收第一增益控制信号，以控制放大晶体管具有向图的底部凸起的分贝增益的第一增益曲线;以及第二增益控制部分， 接收第二控制信号以控制第一晶体管具有向图的顶部凸起的分贝增益的第二增益曲线。 一次馈送第一和第二控制信号以消除增益曲线的非线性以具有总线性增益曲线。

公开(公告)号：US5659261A

公开(公告)日：1997-08-19

申请号：US645139

申请日：1996-05-13

Applicant: Kantilal Bacrania ,  Chong In Chi ,  Gregory James Fisher

Inventor： Kantilal Bacrania ,  Chong In Chi ,  Gregory James Fisher

IPC: G05F3/26 ,  G05F3/30 ,  G11C27/02 ,  H01L27/02 ,  H01L27/06 ,  H03F1/52 ,  H03F3/50 ,  H03G1/00 ,  H03K5/15 ,  H03K17/22 ,  H03M1/16 ,  H03M1/36 ,  H03K17/60

CPC classification number: H03G1/0082 ,  G05F3/262 ,  G05F3/30 ,  G11C27/026 ,  H01L27/0214 ,  H01L27/0623 ,  H01L27/0688 ,  H03F1/523 ,  H03F3/505 ,  H03K17/223 ,  H03K5/15 ,  H03M1/162 ,  H03F2200/294 ,  H03M1/365

Abstract: The A-to-D converter 300 has an output buffer 320 with fourteen drivers each the same as driver 4100. Driver 4100 includes bipolar pull up pull down transistors 4102, 4103. Those transistors are both coupled to an output. Pull up transistor 4102 is coupled to a first reference voltage VDD; pull down transistor 4103 is coupled to a second or ground reference potential. A base drive circuit comprising a series connection between a resistor and a transistor 4121 to provide additional current to saturate the pull down transistor 4103 and thereby lower the collector-to-emitter voltage drop of transistor 4103 when transistor 4103 is turned on.

Abstract translation: A转D转换器300具有输出缓冲器320，其具有与驱动器4100相同的14个驱动器。驱动器4100包括双极上拉下拉晶体管4102,4103。这些晶体管都耦合到输出。 上拉晶体管4102耦合到第一参考电压VDD; 下拉晶体管4103耦合到第二或接地参考电位。 基极驱动电路包括电阻器和晶体管4121之间的串联连接，以提供额外的电流来使下拉晶体管4103饱和，从而当晶体管4103导通时降低晶体管4103的集电极 - 发射极电压降。