公开(公告)号：US07267861B2

公开(公告)日：2007-09-11

申请号：US11140785

申请日：2005-05-31

申请人： Darvin R. Edwards ,  Tz-Cheng Chiu ,  Kejun Zeng

发明人： Darvin R. Edwards ,  Tz-Cheng Chiu ,  Kejun Zeng

IPC分类号： H01L23/532

CPC分类号： H05K3/3436 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/49866 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/09 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2203/1105 ,  Y02P70/613 ,  Y10T428/12715 ,  Y10T428/1291 ,  Y10T428/24917 ,  H01L2924/00

摘要： A metal interconnect structure (100) comprising a bond pad (101), which has copper with at least 70 volume percent composed of crystal grains expanding more than 1 μm in their main direction, and 30 or less volume percent composed of crystal grains, which expand less than 1 μm in their main crystal direction. A body (102) of tin alloy is in contact with the bond pad.

摘要翻译： 一种金属互连结构（100），包括接合焊盘（101），其具有由其主要方向上膨胀超过1um的晶粒构成的至少70体积％的铜以及由晶粒构成的30或更小的体积百分比的铜 在其主晶体方向膨胀小于1mum。 锡合金的主体（102）与接合焊盘接触。

公开(公告)号：US20050186788A1

公开(公告)日：2005-08-25

申请号：US11090103

申请日：2005-03-24

申请人： Jiong-Ping Lu ,  Qi-Zhong Hong ,  Tz-Cheng Chiu ,  Changming Jin ,  David Permana ,  Ting Tsui

发明人： Jiong-Ping Lu ,  Qi-Zhong Hong ,  Tz-Cheng Chiu ,  Changming Jin ,  David Permana ,  Ting Tsui

IPC分类号： H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76834 ,  H01L21/76877 ,  H01L21/76883

摘要： Disclosed is a system for fabricating a semiconductor device (100). An interconnect structure (110) is formed on the semiconductor device (100) and a cap (112) is deposited over the interconnect structure (110). The interconnect structure (110) is annealed with the overlying cap (112) in place. The cap (112) is then removed after the interconnect structure (110) is annealed.

公开(公告)号：US20050133928A1

公开(公告)日：2005-06-23

申请号：US10741919

申请日：2003-12-19

申请人： Gregory Howard ,  Howard Test ,  Tz-Cheng Chiu

发明人： Gregory Howard ,  Howard Test ,  Tz-Cheng Chiu

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/00 ,  H01L23/485 ,  H01L23/498 ,  H05K3/34 ,  H01L23/48 ,  H01L21/44

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13016 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3426 ,  H05K2201/10704 ,  H05K2201/10765 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/013

摘要： A device comprising a workpiece (401) with a surface (401a) including a center (402) and an array of bond pads (420), further an array of interconnects (405) of uniform height. Each of these interconnects comprises an elongated wire loop, which has both wire ends (440, 450) attached to one of the bond pads, respectively, and its major diameter (460) approximately normal to the workpiece surface. A substantial number of the loops has an orientation approximately normal to the vector (410) from the workpiece center to the respective bond pad; this number includes more than 30% of the loops located along the workpiece perimeter and more than 10% of the total loops. Examples of workpieces are a semiconductor device, an integrated circuit (IC) chip, and a semiconductor device package.

摘要翻译： 一种包括具有包括中心（402）和接合焊盘（420）阵列的表面（401a）的工件（401）的装置，还包括均匀高度的互连阵列（405）。 这些互连件中的每一个包括细长的线环，其具有分别连接到一个接合焊盘的两个线端（440,450）以及其大致垂直于工件表面的大直径（460）。 相当多的环路具有大约垂直于从工件中心到相应接合焊盘的矢量（410）的取向; 这个数字包括沿着工件周边设置的超过30％的循环和超过总循环的10％。 工件的实例是半导体器件，集成电路（IC）芯片和半导体器件封装。

公开(公告)号：US20050106505A1

公开(公告)日：2005-05-19

申请号：US10715641

申请日：2003-11-18

申请人： Tz-Cheng Chiu ,  Manjula Variyam

发明人： Tz-Cheng Chiu ,  Manjula Variyam

IPC分类号： G03F7/00 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40

CPC分类号： H05K3/4007 ,  H01L2224/05557 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2201/09909 ,  H01L2924/00

摘要： A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.

摘要翻译： 一种凸起的焊接掩模限定（SMD）焊盘，其被配置为在叠层电子电路板上接收焊球，以及在叠层电子电路板上形成升高的SMD焊盘的方法。 该方法可以包括形成基底凸起，用导电凸起层覆盖基底凸起并且在导电凸块层的延伸边缘上层叠围绕材料。 将周围材料图案化以暴露出导电凸块层的焊盘面和侧面的一部分，使得焊盘面设置在周围材料的表面上方。 周围的材料可以通过光刻操作或者激光钻孔操作来构图。

公开(公告)号：US06784535B1

公开(公告)日：2004-08-31

申请号：US10631130

申请日：2003-07-31

申请人： Tz-Cheng Chiu

发明人： Tz-Cheng Chiu

IPC分类号： H01L2312

CPC分类号： H01L23/04 ,  H01L23/10 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2224/0401

摘要： A composite lid for a semiconductor package, in which the lid includes at least two materials. The first material is disposed over and attached to the back surface of the die with a low-modulus thermal gel and the second material is disposed towards the perimeter of the lid. The second material has a modulus of elasticity greater than the modulus of elasticity of the first material, and preferably, at least twice that of the first material.

摘要翻译： 一种用于半导体封装的复合盖，其中所述盖包括至少两种材料。 第一种材料用低模量热凝胶设置在模具的后表面并附着于模具的后表面，并且第二材料朝向盖的周边设置。 第二材料的弹性模量大于第一材料的弹性模量，优选为第一材料的弹性模量的至少两倍。

公开(公告)号：US08431437B2

公开(公告)日：2013-04-30

申请号：US13082096

申请日：2011-04-07

申请人： Yu-Ren Chen ,  Geng-Shin Shen ,  Tz-Cheng Chiu

发明人： Yu-Ren Chen ,  Geng-Shin Shen ,  Tz-Cheng Chiu

IPC分类号： H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/92 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/96 ,  H01L2224/82 ,  H01L2924/00

摘要： A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.

公开(公告)号：US20110183466A1

公开(公告)日：2011-07-28

申请号：US13082096

申请日：2011-04-07

申请人： Yu-Ren CHEN ,  Geng-Shin Shen ,  Tz-Cheng Chiu

发明人： Yu-Ren CHEN ,  Geng-Shin Shen ,  Tz-Cheng Chiu

IPC分类号： H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/92 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/96 ,  H01L2224/82 ,  H01L2924/00

摘要： A packaging method is disclosed that comprises attaching a plurality of dice, each having a plurality of bonding pads disposed on an active surface, to an adhesive layer on a substrate. A polymer material is formed over at least a portion of both the substrate and the plurality of dice and a molding apparatus is used on the substrate to force the polymer material to substantially fill around the plurality of dice. The molding apparatus is removed to expose a surface of the polymer material and a plurality of cutting streets is formed on an exposed surface of the polymer material. The substrate is removed to expose the active surface of the plurality of dice.

摘要翻译： 公开了一种包装方法，其包括将多个具有设置在活性表面上的多个接合焊盘附着到基板上的粘合剂层的芯片。 聚合物材料形成在基底和多个骰子的至少一部分上，并且在基底上使用模塑设备以迫使聚合物材料基本上填充在多个骰子周围。 去除模制设备以暴露聚合物材料的表面，并且在聚合物材料的暴露表面上形成多个切割街道。 去除衬底以暴露多个裸片的活性表面。

公开(公告)号：US20080218986A1

公开(公告)日：2008-09-11

申请号：US12125172

申请日：2008-05-22

申请人： Charles Anthony Odegard ,  Tz-Cheng Chiu

发明人： Charles Anthony Odegard ,  Tz-Cheng Chiu

IPC分类号： H01L21/00 ,  H05K7/00

CPC分类号： H01L24/81 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2203/0465 ,  H05K2203/306 ,  Y02P70/613

摘要： Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the die during heating of the solder to a liquescent state, thereby increasing the stand-off height of the die above the substrate. The lifting force is maintained during cooling of the solder to a solid state, thereby forming increased stand-off height solder connections.

摘要翻译： 公开了具有增加的间隔高度的集成电路组件以及用于其制造的方法和系统。 本发明的方法提供了通过使晶片与衬底对准并将焊料插入相应衬底和芯片焊盘之间来组装半导体器件。 在将焊料加热到发光状态期间，向模具施加提升力，从而提高模具在基板上方的间隔高度。 在将焊料冷却至固态期间保持提升力，从而形成更高的间隔高度焊接连接。

公开(公告)号：US07393719B2

公开(公告)日：2008-07-01

申请号：US11109258

申请日：2005-04-19

申请人： Charles Anthony Odegard ,  Tz-Cheng Chiu

发明人： Charles Anthony Odegard ,  Tz-Cheng Chiu

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/52 ,  H01L23/48 ,  H01L23/40 ,  H01L23/485 ,  H01L23/488

CPC分类号： H01L24/81 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2203/0465 ,  H05K2203/306 ,  Y02P70/613 ,  Y10T29/41

摘要： Disclosed are integrated circuit assemblies with increased stand-off height and methods and systems for their manufacture. Methods of the invention provide for assembling a semiconductor device by aligning a die with a substrate and interposing solder between corresponding substrate and die bond pads. A lifting force is applied to the die during heating of the solder to a liquescent state, thereby increasing the stand-off height of the die above the substrate. The lifting force is maintained during cooling of the solder to a solid state, thereby forming increased stand-off height solder connections.

摘要翻译： 公开了具有增加的间隔高度的集成电路组件以及用于其制造的方法和系统。 本发明的方法提供了通过使晶片与衬底对准并将焊料插入相应衬底和芯片焊盘之间来组装半导体器件。 在将焊料加热到发光状态期间，向模具施加提升力，从而提高模具在基板上方的间隔高度。 在将焊料冷却至固态期间保持提升力，从而形成更高的间隔高度焊接连接。

公开(公告)号：US20080023834A1

公开(公告)日：2008-01-31

申请号：US11867527

申请日：2007-10-04

申请人： Tz-Cheng Chiu ,  Manjula Variyam

发明人： Tz-Cheng Chiu ,  Manjula Variyam

IPC分类号： H01L23/488

CPC分类号： H05K3/4007 ,  H01L2224/05557 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2201/09909 ,  H01L2924/00

摘要： A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bump with a conductive bump layer and layering a surrounding material over an extended edge of the conductive bump layer. The surrounding material is patterned to expose a pad face and of a portion of the sides of the conductive bump layer, such that the pad face is disposed above the surface of the surrounding material. The surrounding material may be patterned by a photolithography operation or alternatively, a laser-drill operation.

摘要翻译： 一种凸起的焊接掩模限定（SMD）焊盘，其被配置为在叠层电子电路板上接收焊球，以及在叠层电子电路板上形成升高的SMD焊盘的方法。 该方法可以包括形成基底凸起，用导电凸起层覆盖基底凸起并且在导电凸块层的延伸边缘上层叠围绕材料。 将周围材料图案化以暴露出导电凸块层的焊盘面和侧面的一部分，使得焊盘面设置在周围材料的表面上方。 周围的材料可以通过光刻操作或者激光钻孔操作来构图。