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    Method and apparatus for producing semiconductor crystal, and semiconductor crystal
    1.
    发明授权
    Method and apparatus for producing semiconductor crystal, and semiconductor crystal 有权
    用于制造半导体晶体的方法和装置以及半导体晶体

    公开(公告)号：US09187843B2

    公开(公告)日：2015-11-17

    申请号：US13384922

    申请日：2010-07-23

    申请人： Takashi Sakurada ,  Tomohiro Kawase

    发明人： Takashi Sakurada ,  Tomohiro Kawase

    IPC分类号： C30B15/00 ,  C30B15/02 ,  C30B15/20 ,  C30B15/14 ,  C30B11/06 ,  C30B29/40 ,  C30B29/42 ,  C30B29/44

    CPC分类号： C30B15/02 ,  C30B11/06 ,  C30B15/00 ,  C30B15/002 ,  C30B15/14 ,  C30B15/20 ,  C30B29/40 ,  C30B29/42 ,  C30B29/44 ,  Y10T117/1024

    摘要： A method of producing a semiconductor crystal is provided. The method includes the steps of preparing a longitudinal container with a seed crystal and an impurity-containing melt placed in a bottom section and with a suspension part arranged in an upper section and suspending a dropping raw material block made of a semiconductor material having an impurity concentration lower than the impurity concentration of the impurity-containing melt, and creating a temperature gradient in the longitudinal direction of the longitudinal container to melt the dropping raw material block, and solidifying the impurity-containing melt from the side that is in contact with the seed crystal (8) while dropping a produced melt into the impurity-containing melt, thereby producing a semiconductor crystal.

    摘要翻译： 提供一种制造半导体晶体的方法。 该方法包括以下步骤：制备具有放置在底部的晶种和含杂质熔体的纵向容器，并且将悬置部分布置在上部并悬浮由具有杂质的半导体材料制成的滴下原料块 浓度低于含杂质熔体的杂质浓度，并且在纵向容器的长度方向上产生温度梯度，以熔化掉掉的原料块，并使与含有熔融物质的熔融物接触的一侧固化含杂质的熔体 晶种（8），同时将产生的熔体滴入含杂质的熔体中，从而制备半导体晶体。

    Semiconductor device and method of its manufacture
    2.
    发明授权
    Semiconductor device and method of its manufacture 有权
    半导体装置及其制造方法

    公开(公告)号：US08476086B2

    公开(公告)日：2013-07-02

    申请号：US11947752

    申请日：2007-11-29

    申请人： Shinsuke Fujiwara ,  Takashi Sakurada ,  Makoto Kiyama ,  Yusuke Yoshizumi

    发明人： Shinsuke Fujiwara ,  Takashi Sakurada ,  Makoto Kiyama ,  Yusuke Yoshizumi

    IPC分类号： H01L33/00

    CPC分类号： H01L29/2003 ,  C30B25/02 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02658

    摘要： Method of high-yield manufacturing superior semiconductor devices includes: a step of preparing a GaN substrate having a ratio St/S—of collective area (St cm2) of inversion domains in, to total area (S cm2) of the principal face of, the GaN substrate—of no more than 0.5, with the density along the (0001) Ga face, being the substrate principal face, of inversion domains whose surface area where the polarity in the [0001] direction is inverted with respect to the principal domain (matrix) is 1 μm2 or more being D cm−2; and a step of growing on the GaN substrate principal face an at least single-lamina semiconductor layer to form semiconductor devices in which the product Sc×D of the area Sc of the device principal faces, and the density D of the inversion domains is made less than 2.3.

    摘要翻译： 高产率制造方法优异的半导体器件包括：制备具有反向畴的总面积（St cm2）的St / S-与主面的总面积（S cm2）的GaN衬底的步骤， 所述GaN衬底的不大于0.5，其中沿[0001]方向的极性的表面积相对于所述主结构域反转的反转畴的（0001）Ga面的密度（作为衬底主面） （矩阵）为1mum2以上为Dcm-2; 并且在GaN衬底主体上生长至少单层半导体层以形成半导体器件的步骤，其中器件主要面积Sc的乘积Sc×D面向反射区域的密度D 小于2.3。

    METHOD FOR MANUFACTURING GALLIUM NITRIDE CRYSTAL AND GALLIUM NITRIDE WAFER
    4.
    发明申请
    METHOD FOR MANUFACTURING GALLIUM NITRIDE CRYSTAL AND GALLIUM NITRIDE WAFER 审中-公开
    制造氮化镓晶体和氮化铝膜的方法

    公开(公告)号：US20120164058A1

    公开(公告)日：2012-06-28

    申请号：US13402131

    申请日：2012-02-22

    申请人： Tomoki UEMURA ,  Takashi SAKURADA ,  Shinsuke FUJIWARA ,  Takuji OKAHISA ,  Koji UEMATSU ,  Hideaki NAKAHATA

    发明人： Tomoki UEMURA ,  Takashi SAKURADA ,  Shinsuke FUJIWARA ,  Takuji OKAHISA ,  Koji UEMATSU ,  Hideaki NAKAHATA

    IPC分类号： C01B21/06 ,  C30B19/12 ,  C30B23/02

    CPC分类号： H01L21/02623 ,  C30B25/186 ,  C30B25/20 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02658

    摘要： There is provided a method for fabricating a gallium nitride crystal with low dislocation density, high crystallinity, and resistance to cracking during polishing of sliced pieces by growing the gallium nitride crystal using a gallium nitride substrate including dislocation-concentrated regions or inverted-polarity regions as a seed crystal substrate. Growing a gallium nitride crystal 79 at a growth temperature higher than 1,100° C. and equal to or lower than 1,300° C. so as to bury dislocation-concentrated regions or inverted-polarity regions 17a reduces dislocations inherited from the dislocation-concentrated regions or inverted regions 17a, thus preventing new dislocations from occurring over the dislocation-concentrated regions or inverted-polarity regions 17a. This also increases the crystallinity of the gallium nitride crystal 79 and its resistance to cracking during the polishing.

    摘要翻译： 提供了通过使用包括位错集中区域或反极性区域的氮化镓衬底生长氮化镓晶体来制造在切片的研磨期间具有低位错密度，高结晶度和耐龟裂性的氮化镓晶体的方法， 晶种基片。 在高于1100℃并且等于或低于1300℃的生长温度下生长氮化镓晶体79，以便掩埋位错集中区域或反极性区域17a减少从位错集中区域遗留的位错或 反转区域17a，从而防止在位错集中区域或反极性区域17a上发生新的位错。 这也增加了氮化镓晶体79的结晶度及其在抛光过程中的抗开裂性。

    METHOD AND APPARATUS FOR PRODUCING SEMICONDUCTOR CRYSTAL, AND SEMICONDUCTOR CRYSTAL
    5.
    发明申请
    METHOD AND APPARATUS FOR PRODUCING SEMICONDUCTOR CRYSTAL, AND SEMICONDUCTOR CRYSTAL 有权
    用于生产半导体晶体的方法和装置，以及半导体晶体

    公开(公告)号：US20120112135A1

    公开(公告)日：2012-05-10

    申请号：US13384922

    申请日：2010-07-23

    申请人： Takashi Sakurada ,  Tomohiro Kawase

    发明人： Takashi Sakurada ,  Tomohiro Kawase

    IPC分类号： H01B1/02 ,  C30B19/00

    CPC分类号： C30B15/02 ,  C30B11/06 ,  C30B15/00 ,  C30B15/002 ,  C30B15/14 ,  C30B15/20 ,  C30B29/40 ,  C30B29/42 ,  C30B29/44 ,  Y10T117/1024

    摘要： A method of producing a semiconductor crystal is provided. The method includes the steps of preparing a longitudinal container with a seed crystal and an impurity-containing melt placed in a bottom section and with a suspension part arranged in an upper section and suspending a dropping raw material block made of a semiconductor material having an impurity concentration lower than the impurity concentration of the impurity-containing melt, and creating a temperature gradient in the longitudinal direction of the longitudinal container to melt the dropping raw material block, and solidifying the impurity-containing melt from the side that is in contact with the seed crystal (8) while dropping a produced melt into the impurity-containing melt, thereby producing a semiconductor crystal.

    摘要翻译： 提供一种制造半导体晶体的方法。 该方法包括以下步骤：制备具有放置在底部的晶种和含杂质熔体的纵向容器，并且将悬置部分布置在上部并悬浮由具有杂质的半导体材料制成的滴下原料块 浓度低于含杂质熔体的杂质浓度，并且在纵向容器的长度方向上产生温度梯度，以熔化掉掉的原料块，并使与含有熔融物质的熔融物接触的一侧固化含杂质的熔体 晶种（8），同时将产生的熔体滴入含杂质的熔体中，从而制备半导体晶体。

    METHOD OF MANUFACTURING NITRIDE SUBSTRATE, AND NITRIDE SUBSTRATE
    6.
    发明申请
    METHOD OF MANUFACTURING NITRIDE SUBSTRATE, AND NITRIDE SUBSTRATE 有权
    制备氮化物基质和氮化物基质的方法

    公开(公告)号：US20110156213A1

    公开(公告)日：2011-06-30

    申请号：US13061307

    申请日：2009-08-26

    申请人： Satoshi Arakawa ,  Michimasa Miyanaga ,  Takashi Sakurada ,  Yoshiyuki Yamamoto ,  Hideaki Nakahata

    发明人： Satoshi Arakawa ,  Michimasa Miyanaga ,  Takashi Sakurada ,  Yoshiyuki Yamamoto ,  Hideaki Nakahata

    IPC分类号： H01L29/20 ,  H01L21/20

    CPC分类号： H01L21/02021 ,  C30B25/00 ,  C30B29/403 ,  C30B29/406 ,  C30B33/00 ,  H01L21/02013 ,  H01L21/02389

    摘要： A method of manufacturing a nitride substrate includes the following steps. Firstly, a nitride crystal is grown. Then, the nitride substrate including a front surface is cut from the nitride crystal. In the step of cutting, the nitride substrate is cut such that an off angle formed between an axis orthogonal to the front surface and an m-axis or an a-axis is greater than zero. When the nitride crystal is grown in a c-axis direction, in the step of cutting, the nitride substrate is cut from the nitride crystal along a flat plane which passes through a front surface and a rear surface of the nitride crystal and does not pass through a line segment connecting a center of a radius of curvature of the front surface with a center of a radius of curvature of the rear surface of the nitride crystal.

    摘要翻译： 制造氮化物衬底的方法包括以下步骤。 首先，生长氮化物晶体。 然后，从氮化物晶体切割包括前表面的氮化物衬底。 在切割步骤中，切割氮化物衬底，使得在与正面正交的轴与m轴或a轴之间形成的偏角大于零。 当氮化物晶体沿c轴方向生长时，在切割步骤中，沿着通过氮化物晶体的前表面和后表面的平坦平面从氮化物晶体切割氮化物衬底，并且不通过 通过将前表面的曲率半径的中心与氮化物晶体的后表面的曲率半径的中心连接的线段。

    Group III Nitride Semiconductor Device and Epitaxial Substrate
    9.
    发明申请
    Group III Nitride Semiconductor Device and Epitaxial Substrate 审中-公开
    第III族氮化物半导体器件和外延衬底

    公开(公告)号：US20080265258A1

    公开(公告)日：2008-10-30

    申请号：US11569066

    申请日：2006-03-03

    申请人： Tatsuya Tanabe ,  Makoto Kiyama ,  Kouhei Miura ,  Takashi Sakurada

    发明人： Tatsuya Tanabe ,  Makoto Kiyama ,  Kouhei Miura ,  Takashi Sakurada

    IPC分类号： H01L29/205 ,  H01L29/778

    CPC分类号： H01L29/66462 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02587 ,  H01L29/7787

    摘要： Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be decreased. In a high electron mobility transistor 1, a supporting substrate 3 is composed of AlN, AlGaN, or GaN. An AlyGa1-yN epitaxial layer 5 has a surface roughness (RMS) of 0.25 mm or less, wherein the surface roughness is defined by a square area measuring 1 μm per side. A GaN epitaxial layer 7 is provided between the AlyGa1-yN supporting substrate 3 and the AlyGa1-yN epitaxial layer 5. A Schottky electrode 9 is provided on the AlyGa1-yN epitaxial layer 5. A first ohmic electrode 11 is provided on the AlyGa1-yN epitaxial layer 5. A second ohmic electrode 13 is provided on the AlyGa1-yN epitaxial layer 5. One of the first and second ohmic electrodes 11 and 13 constitutes a source electrode, and the other constitutes a drain electrode. The Schottky electrode 9 constitutes a gate electrode of the high electron mobility transistor 1.

    摘要翻译： 提供可以减少来自肖特基电极的漏电流的III族氮化物半导体器件。 在高电子迁移率晶体管1中，支撑基板3由AlN，AlGaN或GaN构成。 Al钇1-y N外延层5具有0.25mm或更小的表面粗糙度（RMS），其中表面粗糙度由测量1的正方形面积 妈妈每边。 在AlGaN外延层7之间设置有支撑衬底3的Al 1 Y y-N支撑衬底和Al 1 Al- 在N外延层5上设置肖特基电极9.设置第一欧姆电极11和第一欧姆电极11。 在Al钇1-y N外延层5上。第二欧姆电极13设置在Al钇1 Ga -Y / N外延层5.第一和第二欧姆电极11和13中的一个构成源电极，另一个构成漏电极。 肖特基电极9构成高电子迁移率晶体管1的栅电极。