公开(公告)号：US08679955B2

公开(公告)日：2014-03-25

申请号：US13202419

申请日：2010-02-10

申请人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

发明人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

IPC分类号： H01L21/20

CPC分类号： H01L21/0262 ,  C30B25/02 ,  C30B29/16 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L33/007

摘要： A method for forming an epitaxial wafer is provided as one enabling growth of a gallium nitride based semiconductor with good crystal quality on a gallium oxide region. In step S107, an AlN buffer layer 13 is grown. In step S108, at a time t5, a source gas G1 containing hydrogen, trimethylaluminum, and ammonia, in addition to nitrogen, is supplied into a growth reactor 10 to grow the AlN buffer layer 13 on a primary surface 11a. The AlN buffer layer 13 is so called a low-temperature buffer layer. After a start of film formation of the buffer layer 13, in step S109 supply of hydrogen (H2) is started at a time t6. At the time t6, H2, N2, TMA, and NH3 are supplied into the growth reactor 10. A supply amount of hydrogen is increased between times t6 and t7, and at the time t7 the increase of hydrogen is terminated to supply a constant amount of hydrogen. At the time t7, H2, TMA, and NH3 are supplied into the growth reactor 10.

摘要翻译： 提供了一种用于形成外延晶片的方法，其可以在氧化镓区域上使得能够以良好的晶体质量生长氮化镓基半导体。 在步骤S107中，生长AlN缓冲层13。 在步骤S108中，在时刻t5，将除了氮以外的氢，三甲基铝和氨的原料气G1供给到生长反应器10中，以在主面11a上生长AlN缓冲层13。 AlN缓冲层13被称为低温缓冲层。 在开始形成缓冲层13之后，在步骤S109中，在时刻t6开始供给氢（H2）。 在时间t6，H2，N2，TMA和NH3被供应到生长反应器10中。在时间t6和t7之间，氢的供应量增加，而在时间t7，氢的增加被终止以提供恒定的量 的氢。 在时间t7，将H2，TMA和NH3供应到生长反应器10中。

公开(公告)号：US08540817B2

公开(公告)日：2013-09-24

申请号：US12989015

申请日：2009-04-17

申请人： Issei Satoh ,  Michimasa Miyanaga ,  Shinsuke Fujiwara ,  Hideaki Nakahata

发明人： Issei Satoh ,  Michimasa Miyanaga ,  Shinsuke Fujiwara ,  Hideaki Nakahata

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B23/00 ,  C23C14/0617 ,  C23C14/28 ,  C30B25/00 ,  C30B25/02 ,  C30B28/12 ,  C30B28/14 ,  C30B29/36 ,  C30B29/38 ,  C30B29/403 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02447 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02617 ,  Y10T428/24471

摘要： There are provided a method for manufacturing a Si(1-v-w-x)CwAlxNv substrate having a reduced number of cracks and high processability, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer.A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer (0

摘要翻译： 提供了具有减少的裂纹数和加工性能降低的Si（1-v-w-x）C w Al x N v衬底的制造方法，外延晶片的制造方法，Si（1-v-w-x）C w Al x N v衬底和外延晶片。 制造Si（1-v-w-x）C w Al x N v衬底10a的方法包括以下步骤。 首先，准备Si基板11。 然后在Si衬底上，在低于1℃的温度下生长Si（1-vwx）C w Al x N v层（0

公开(公告)号：US08501592B2

公开(公告)日：2013-08-06

申请号：US13006429

申请日：2011-01-14

申请人： Shinsuke Fujiwara ,  Seiji Nakahata

发明人： Shinsuke Fujiwara ,  Seiji Nakahata

IPC分类号： H01L21/20

CPC分类号： C30B29/403 ,  C30B9/12 ,  C30B19/02 ,  C30B25/20

摘要： Freestanding III-nitride single-crystal substrates whose average dislocation density is not greater than 5×105 cm−2 and that are fracture resistant, and a method of manufacturing semiconductor devices utilizing such freestanding III-nitride single-crystal substrates are made available. The freestanding III-nitride single-crystal substrate includes one or more high-dislocation-density regions (20h), and a plurality of low-dislocation-density regions (20k) in which the dislocation density is lower than that of the high-dislocation-density regions (20h), wherein the average dislocation density is not greater than 5×105 cm−2. Herein, the ratio of the dislocation density of the high-dislocation-density region(s) (20h) to the average dislocation density is sufficiently large to check the propagation of cracks in the substrate. And the semiconductor device manufacturing method utilizes the freestanding III-nitride single crystal substrate (20p).

摘要翻译： 可以获得平均位错密度不大于5×105cm-2并且是耐断裂性的独立的III族氮化物单晶衬底，以及利用这种独立式III族氮化物单晶衬底制造半导体器件的方法。 独立的III族氮化物单晶衬底包括一个或多个高位错密度区域（20h）和位错密度低于高位错密度区域（20k）的多个低位错密度区域（20k） 密度区域（20h），其中平均位错密度不大于5×105cm-2。 这里，高位错密度区域（20h）的位错密度与平均位错密度的比例足够大，以检查基板中的裂纹的传播。 并且半导体器件制造方法利用独立的III族氮化物单晶衬底（20p）。

公开(公告)号：US08435866B2

公开(公告)日：2013-05-07

申请号：US13256991

申请日：2010-09-28

申请人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

发明人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Kyoko Okita ,  Hiroki Inoue ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC分类号： H01L21/306 ,  H01L21/304

CPC分类号： C30B29/36 ,  C30B33/06

摘要： At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.

摘要翻译： 制备至少一个具有背面并由碳化硅制成的单晶基板和具有主表面并由碳化硅制成的支撑部分。 在该制备步骤中，通过机械加工形成背面和主表面中的至少一个。 通过该形成步骤，在背面和主面中的至少一个上形成有晶体结构变形的表层。 表面层至少部分去除。 在该去除步骤之后，背面和主表面彼此连接。

公开(公告)号：US20120329245A1

公开(公告)日：2012-12-27

申请号：US13338263

申请日：2011-12-28

申请人： Koji Uematsu ,  Hideki Osada ,  Seiji Nakahata ,  Shinsuke Fujiwara

发明人： Koji Uematsu ,  Hideki Osada ,  Seiji Nakahata ,  Shinsuke Fujiwara

IPC分类号： H01L21/78 ,  C01B21/06

CPC分类号： H01L29/045 ,  C01B21/0632 ,  C01P2002/90 ,  C01P2006/12 ,  C30B29/403 ,  C30B29/406 ,  C30B33/06 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02658 ,  H01L33/16 ,  H01L33/32

摘要： A method for producing a group III nitride crystal in the present invention includes the steps of cutting a plurality of group III nitride crystal substrates 10p and 10q having a main plane from a group III nitride bulk crystal 1, the main planes 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the main planes 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a group III nitride crystal 20 on the main planes 10pm and 10qm of the substrates 10p and 10q.

摘要翻译： 本发明的III族氮化物晶体的制造方法包括从III族氮化物本体晶体1切割出具有主面的多个III族氮化物晶体基板10p，10q，主平面10pm，10qm具有 平面取向相对于从{20-21}，{20-2-1}，{22-41}和{22-41}组成的组中的晶体 - 几何等效平面取向具有5度或更小的偏离角度， 22-4-1}，使基板10p和10q彼此相邻地布置，使得基板10p和10q的主平面10pm和10qm彼此平行，并且基板10p和10q的每个[0001]方向与 并且在基板10p和10q的主平面10pm和10qm上生长III族氮化物晶体20。

公开(公告)号：US20120308758A1

公开(公告)日：2012-12-06

申请号：US13475360

申请日：2012-05-18

申请人： Tsutomu HORI ,  Makoto SASAKI ,  Taro NISHIGUCHI ,  Shinsuke FUJIWARA

发明人： Tsutomu HORI ,  Makoto SASAKI ,  Taro NISHIGUCHI ,  Shinsuke FUJIWARA

IPC分类号： C30B29/36 ,  C30B29/66 ,  C30B23/00

CPC分类号： C30B23/00 ,  C30B29/36

摘要： A silicon carbide crystal ingot having a surface greater than or equal to 4 inches, having an n-type dopant concentration greater than or equal to 1×1015 atoms/cm3 and less than or equal to 1×1020 atoms/cm3, a metal atom concentration greater than or equal to 1×1014 atoms/cm3 and less than or equal to 1×1018 atoms/cm3, and not exceeding the n-type dopant concentration, and a metal atom concentration gradient less than or equal to 1×1017 atoms/(cm3·mm), a silicon carbide single crystal wafer produced using the ingot, and a method for fabricating the silicon carbide crystal ingot.

摘要翻译： 具有大于或等于4英寸的表面，具有大于或等于1×1015原子/ cm3且小于或等于1×1020原子/ cm3的n型掺杂剂浓度的碳化硅晶锭，金属原子 浓度大于或等于1×1014原子/ cm3且小于或等于1×1018原子/ cm3，并且不超过n型掺杂剂浓度，并且小于或等于1×1017原子的金属原子浓度梯度 /（cm 3·mm），使用该锭制造的碳化硅单晶晶片和制造碳化硅晶体锭的方法。

公开(公告)号：US20120241741A1

公开(公告)日：2012-09-27

申请号：US13420117

申请日：2012-03-14

申请人： Hiroki INOUE ,  Shin Harada ,  Tsutomu Hori ,  Shinsuke Fujiwara

发明人： Hiroki INOUE ,  Shin Harada ,  Tsutomu Hori ,  Shinsuke Fujiwara

IPC分类号： H01L29/04 ,  H01L29/24

CPC分类号： C30B29/36 ,  C30B33/06 ,  H01L21/187 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/7827

摘要： A first single crystal substrate has a first side surface and it is composed of silicon carbide. A second single crystal substrate has a second side surface opposed to the first side surface and it is composed of silicon carbide. A bonding portion connects the first and second side surfaces to each other between the first and second side surfaces, and it is composed of silicon carbide. At least a part of the bonding portion has polycrystalline structure. Thus, a large-sized silicon carbide substrate allowing manufacturing of a semiconductor device with high yield can be provided.

摘要翻译： 第一单晶基板具有第一侧表面，并且由碳化硅构成。 第二单晶基板具有与第一侧面相对的第二侧面，由碳化硅构成。 接合部分将第一和第二侧表面彼此连接在第一和第二侧表面之间，并且由碳化硅构成。 结合部的至少一部分具有多晶结构。 因此，可以提供允许以高产率制造半导体器件的大尺寸碳化硅衬底。

公开(公告)号：US20120070929A1

公开(公告)日：2012-03-22

申请号：US13318039

申请日：2010-03-01

申请人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

发明人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

IPC分类号： H01L33/36 ,  H01L21/20

CPC分类号： C23C16/0227 ,  C23C16/0272 ,  C23C16/303 ,  C30B25/183 ,  C30B29/406 ,  H01L33/007

摘要： Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

摘要翻译： 本发明提供一种制造晶片产品的方法，该晶片产品包括在氧化镓衬底上生长的有源层并且能够提高发光强度。 在步骤S105中，在氧化镓衬底11的主表面11a上以600摄氏度生长由诸如GaN，AlGaN或AlN的III族氮化物构成的缓冲层13.在缓冲层13生长之后，同时 将含有氢和氮的气体G2供给到生长反应器10中，将氧化镓衬底11和缓冲层13在生长反应器11中的气氛中以1050摄氏度暴露。 在改性缓冲层上生长III族氮化物半导体层15。 改性缓冲层包括例如空隙。 III族氮化物半导体层15可以由GaN和AlGaN构成。 当由这些材料形成III族氮化物半导体层15时，在改性缓冲层14上获得优异的晶体质量。

公开(公告)号：USD651991S1

公开(公告)日：2012-01-10

申请号：US29379460

申请日：2010-11-19

申请人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa

设计人： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa

公开(公告)号：US07998836B1

公开(公告)日：2011-08-16

申请号：US12912932

申请日：2010-10-27

申请人： Hiromu Shiomi ,  Shinsuke Fujiwara ,  Yu Saitoh ,  Makoto Kiyama

发明人： Hiromu Shiomi ,  Shinsuke Fujiwara ,  Yu Saitoh ,  Makoto Kiyama

IPC分类号： H01L21/30

CPC分类号： H01L29/66219 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/861 ,  H01L29/872

摘要： A method of fabricating a gallium nitride-based semiconductor electronic device is provided, the method preventing a reduction in adhesiveness between a gallium nitride-based semiconductor layer and a conductive substrate. A substrate 11 is prepared. The substrate 11 has a first surface 11a and a second surface 11b, the first surface 11a allowing a gallium nitride-based semiconductor to be deposited thereon. The substrate 11 includes a support 13 of a material different from the gallium nitride-based semiconductor. The support is exposed on the second surface 11b of the substrate 11. An array of grooves 15 is provided in the second surface 11b. A semiconductor region including at least one gallium nitride-based semiconductor layer is deposited on the first surface 11a of the substrate 11, and thereby an epitaxial substrate E is fabricated. A conductive substrate 33 is bonded to the epitaxial substrate E such that the semiconductor region 17 is provided between the first surface 11a of the substrate 11 and the conductive substrate E. Subsequently, the second surface 11b is irradiated with laser light for laser lift-off.

摘要翻译： 提供了一种制造氮化镓基半导体电子器件的方法，该方法防止了氮化镓基半导体层与导电基片之间的粘附性的降低。 制备基板11。 基板11具有第一表面11a和第二表面11b，第一表面11a允许沉积氮化镓基半导体。 基板11包括与氮化镓基半导体不同的材料的支撑体13。 支撑体暴露在基板11的第二表面11b上。在第二表面11b中设置有一组槽15。 包括至少一个氮化镓基半导体层的半导体区域沉积在衬底11的第一表面11a上，由此制造外延衬底E。 将导电基板33接合到外延基板E，使得半导体区域17设置在基板11的第一表面11a和导电基板E之间。接着，用激光照射激光剥离第二表面11b 。