Abstract:
A perpendicular spin orbit memory device includes a first electrode having a magnetic material and platinum and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first electrode, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.
Abstract:
An integrated circuit structure comprises a substrate. An antiferroelectric gate oxide is above the substrate, the antiferroelectric gate oxide comprising a perovskite material. A gate electrode is over at least a portion of the gate oxide.
Abstract:
An embodiment of the invention includes a memory cell having a magnet layer coupled to a metal layer and read line. The metal layer is also coupled to write and sense lines. During a write operation charge current is supplied to the metal layer via the write line and induces spin current and a magnetic state within the magnet layer based on the spin Hall effect. During a read operation read current is supplied, via the read line, to the magnet layer and then the metal layer and induces another spin current, within the metal layer, that generates an electric field and voltage, based on inverse spin Hall effect, at a sense node coupled to the sense line. The voltage polarity is based on the aforementioned magnetic state. The memory operates with a low supply voltage to drive charge, read, and spin currents. Other embodiments are described herein.
Abstract:
In general, in one aspect, an apparatus includes a phase frequency detector, a charge pump, a voltage controlled oscillator, an integral capacitor to maintain an integral charge and provide an integral voltage, and a mutual-charge canceling sample reset (MCSR) capacitor to maintain a proportional charge and provide a proportional voltage each reference clock cycle. The MCSR includes a first proportional capacitor, a second proportional capacitor in parallel to, and having substantially identical capacitance value as, the first proportional capacitor, a first set of switches to provide direct coupling of the first and second proportional capacitors, and a second set of switches to provide cross coupling of the first and second proportional capacitors. The first and second set of switches alternatively turn on and off every reference clock cycle so that set of switches coupling the first and second proportional capacitors alternates every reference clock cycle.
Abstract:
A multiple segment steel rule die is provided comprising a base plate having one or more channels formed therein, cutting rules secured in the channels, scoring rules secured in the channels, and at least one counter plate for cooperating with the base plate. The counter plate has slots formed therein for receiving the scoring rules. The base plate and the at least one counter plate are removably fixed to opposite heads of a press to facilitate operation of the steel rule die. The multiple segment steel rule die produces at least two blanks from stock material during a pressing operation.
Abstract:
The invention relates to an optical microscope, comprising, at least a light source, a carrier for an object to be examined, a detector for registering the illuminated object, and a light path that during operation runs substantially from the light source to the object and form the object to the detector, wherein a metallic film having a periodic hole array is placed in the light path between the light source and the object, and wherein the carrier of the object is provided with a drive to allow the same to be adjusted in the plane of the carrier, wherein the holes of the metallic thin film have a diameter that is smaller than approximately 250 nm, in that the drive is designed for adjusting the carrier for the object in an orientation perpendicular to the plane of the carrier, and in that a processing device is provided that is connected with the detector for constructing a three-dimensional image of the object.
Abstract:
A package allowing both electrical and optical coupling between one or more integrated circuits and a printed circuit board (PCB) has an optical waveguide structure in addition to electrical connections. An optically active device is flip-chip bonded directly to an integrated circuit using solder bump technology. The optically active device has a lens directly attached to it to facilitate optical coupling to the optical waveguide. The integrated circuit is flip-chip bonded to a Ball Grid Array (BGA) package. The BGA package is bonded to the PCB using solder reflow technology.
Abstract:
A surface emitting laser (SEL) with an integrated absorber. A lower mirror and an output coupler define a laser cavity of the SEL. A monolithic gain structure positioned in the laser cavity includes a gain region and an absorber, wherein a saturation fluence of the absorber is less than a saturation fluence of the gain region.
Abstract:
The present invention provides a mechanism for adjusting the activity of an integrated digital circuit such as a processor to reduce voltage changes attributable to current changes triggered by clock gating. The processor includes one or more functional units and a current control circuit that monitors activity states of the processor's functional units to estimate the current consumed over n clock cycles. The current control circuit estimates the current change for a given clock cycle from the n activity states and compares the estimated current change with first and second thresholds. The processors activity is decreased if the estimated current change is greater than the first threshold, and the processor activity is decreased if the estimated current change is less than the second threshold.