公开(公告)号：US20100157568A1

公开(公告)日：2010-06-24

申请号：US12342266

申请日：2008-12-23

申请人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl

发明人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl

IPC分类号： H05K7/00 ,  H01L21/50

CPC分类号： H01L23/3735 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2224/82 ,  H01L2924/00

摘要： One aspect is a method of manufacturing a semiconductor device and semiconductor device. One embodiment provides a plurality of modules. Each of the modules includes a carrier and at least one semiconductor chip attached to the carrier. A dielectric layer is applied to the modules to form a workpiece. The dielectric layer is structured to open at least one of the semiconductor chips. The workpiece is singulated to obtain a plurality of devices.

摘要翻译： 一个方面是制造半导体器件和半导体器件的方法。 一个实施例提供多个模块。 每个模块包括载体和连接到载体的至少一个半导体芯片。 将介电层施加到模块以形成工件。 介电层被构造成打开至少一个半导体芯片。 将工件分割成多个装置。

公开(公告)号：US20090072415A1

公开(公告)日：2009-03-19

申请号：US11854877

申请日：2007-09-13

申请人： Joachim Mahler ,  Henrik Ewe ,  Manfred Mengel

发明人： Joachim Mahler ,  Henrik Ewe ,  Manfred Mengel

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L23/49524 ,  H01L23/49562 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/16 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/82039 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14

摘要： An integrated circuit device includes a semiconductor device having an integrated circuit. A gas-phase deposited insulation layer is disposed on the semiconductor device, and a conducting line is disposed over the gas-phase deposited insulation layer.

摘要翻译： 集成电路器件包括具有集成电路的半导体器件。 气相沉积绝缘层设置在半导体器件上，并且导电线设置在气相沉积绝缘层上。

公开(公告)号：US07479691B2

公开(公告)日：2009-01-20

申请号：US11376871

申请日：2006-03-16

申请人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann

发明人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann

IPC分类号： H01L23/495

CPC分类号： H01L23/49562 ,  H01L23/49524 ,  H01L23/49844 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/82039 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A power semiconductor module having surface-mountable flat external contact areas and a method for producing the same is disclosed. In one embodiment, the top sides of the external contacts form an inner housing plane, on which at least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the edge sides of the semiconductor chip as far as the inner housing plane whilst leaving free the source and gate contact areas on the top side of the semiconductor chip and also whilst partly leaving free the top sides of the corresponding external contacts. Arranged on the insulation layer is a connecting conductive layer between the source contact areas on the top side of the semiconductor chip and the top sides of the source external contacts, and also a gate connecting layer from the gate contact areas to the top side of the gate external contact.

摘要翻译： 公开了一种具有表面安装平坦的外部接触区域的功率半导体模块及其制造方法。 在一个实施例中，外部接触件的顶侧形成内部壳体平面，其上至少一个功率半导体芯片由其后侧固定在排水外部接触件上。 绝缘层覆盖半导体芯片的边缘侧的顶侧至内部壳体平面，同时在半导体芯片的顶侧上释放源极和栅极接触区域，并且同时部分地释放半导体芯片的顶侧 相应的外部联系人。 在绝缘层上排列的是在半导体芯片的上侧的源极接触区域和源极外部接触件的顶侧之间的连接导电层，以及从栅极接触区域到顶部侧的栅极连接层 门外部接触。

公开(公告)号：US20080203550A1

公开(公告)日：2008-08-28

申请号：US11685321

申请日：2007-03-13

申请人： Henrik Ewe ,  Joachim Mahler

发明人： Henrik Ewe ,  Joachim Mahler

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L23/4334 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/074 ,  H01L25/117 ,  H01L25/162 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00

摘要： A component has a device applied to a device carrier, a first conducting layer grown onto the device and onto the device carrier, and an insulating material applied to the first conducting layer such that only a portion of the first conducting layer is covered.

摘要翻译： 组件具有施加到器件载体的器件，生长在器件上并在器件载体上的第一导电层，以及施加到第一导电层的绝缘材料，使得只有第一导电层的一部分被覆盖。

公开(公告)号：US20080013249A1

公开(公告)日：2008-01-17

申请号：US11457318

申请日：2006-07-13

申请人： Henrik Ewe ,  Karl Weidner

发明人： Henrik Ewe ,  Karl Weidner

IPC分类号： H01G4/008

CPC分类号： H01L23/49548 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/49517 ,  H01L23/49562 ,  H01L24/24 ,  H01L24/33 ,  H01L24/75 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/75315 ,  H01L2224/7598 ,  H01L2224/82039 ,  H01L2224/83801 ,  H01L2224/83825 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/8382 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for producing a dielectric layer extending between two or more elements of an electronic component includes arranging a free-standing dielectric layer above the elements and a deformable support layer below the elements. The free-standing dielectric layer is laminated onto at least a portion of the first surface of the first element and onto at least a portion of the first surface of the second element such that a portion of the dielectric layer extends between the first surface of the first element and the first surface of the second element.

摘要翻译： 用于制造在电子部件的两个或更多个元件之间延伸的电介质层的方法包括在元件上方设置独立的电介质层和在元件下面形成可变形的支撑层。 独立电介质层被层压到第一元件的第一表面的至少一部分上并且到达第二元件的第一表面的至少一部分上，使得电介质层的一部分在第一元件的第一表面之间延伸 第一元件和第二元件的第一表面。

公开(公告)号：US09123687B2

公开(公告)日：2015-09-01

申请号：US13523525

申请日：2012-06-14

申请人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl

发明人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl

IPC分类号： H01L23/32 ,  H01L23/373 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00

CPC分类号： H01L23/3735 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  H01L2224/82 ,  H01L2924/00

摘要： One aspect is a method of manufacturing a semiconductor device and semiconductor device. One embodiment provides a plurality of modules. Each of the modules includes a carrier and at least one semiconductor chip attached to the carrier. A dielectric layer is applied to the modules to form a workpiece. The dielectric layer is structured to open at least one of the semiconductor chips. The workpiece is singulated to obtain a plurality of devices.

摘要翻译： 一个方面是制造半导体器件和半导体器件的方法。 一个实施例提供多个模块。 每个模块包括载体和连接到载体的至少一个半导体芯片。 将介电层施加到模块以形成工件。 介电层被构造成打开至少一个半导体芯片。 将工件分割成多个装置。

公开(公告)号：US09059083B2

公开(公告)日：2015-06-16

申请号：US11855712

申请日：2007-09-14

申请人： Henrik Ewe ,  Joachim Mahler ,  Manfred Mengel ,  Reimund Engl ,  Josef Hoeglauer ,  Jochen Dangelmaier

发明人： Henrik Ewe ,  Joachim Mahler ,  Manfred Mengel ,  Reimund Engl ,  Josef Hoeglauer ,  Jochen Dangelmaier

IPC分类号： H01L23/12 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L23/5389 ,  H01L21/02282 ,  H01L21/02288 ,  H01L21/288 ,  H01L21/31105 ,  H01L21/4821 ,  H01L21/6835 ,  H01L21/76801 ,  H01L21/76871 ,  H01L21/76877 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2221/68345 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24137 ,  H01L2224/24145 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24998 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2225/06568 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19043 ,  H01L2924/00 ,  H05K3/4661

摘要： A semiconductor device is disclosed. One embodiment includes a carrier, a semiconductor chip attached to the carrier, a first conducting line having a first thickness and being deposited over the semiconductor chip and the carrier and a second conducting line having a second thickness and being deposited over the semiconductor chip and the carrier. The first thickness is smaller than the second thickness.

摘要翻译： 公开了一种半导体器件。 一个实施例包括载体，附接到载体的半导体芯片，具有第一厚度并沉积在半导体芯片和载体上的第一导线和具有第二厚度并沉积在半导体芯片上的第二导线， 载体 第一厚度小于第二厚度。

公开(公告)号：US08816504B2

公开(公告)日：2014-08-26

申请号：US13013022

申请日：2011-01-25

申请人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl ,  Stefan Landau

发明人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl ,  Stefan Landau

IPC分类号： H01L29/72

摘要： A device includes a first semiconductor chip with a first contact pad on a first face and a second semiconductor chip with a first contact pad on a first face. The second semiconductor chip is placed over the first semiconductor chip, wherein the first face of the first semiconductor chip faces the first face of the second semiconductor chip. Exactly one layer of an electrically conductive material is arranged between the first semiconductor chip and the second semiconductor chip. The exactly one layer of an electrically conductive material electrically couples the first contact pad of the first semiconductor chip to the first contact pad of the second semiconductor chip.

公开(公告)号：US08664043B2

公开(公告)日：2014-03-04

申请号：US12628428

申请日：2009-12-01

申请人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl ,  Stefan Landau

发明人： Henrik Ewe ,  Joachim Mahler ,  Anton Prueckl ,  Stefan Landau

IPC分类号： H01L21/44

CPC分类号： H01L23/481 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0557 ,  H01L2224/24137 ,  H01L2224/2518 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/05 ,  H05K1/185 ,  H05K1/188 ,  H05K3/4644 ,  H05K2201/09745 ,  H05K2201/09972 ,  H05K2203/0353 ,  H05K2203/1469 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method of manufacturing a laminate electronic device is disclosed. One embodiment provides a carrier, the carrier defining a first main surface and a second main surface opposite to the first main surface. The carrier has a recess pattern formed in the first main surface. A first semiconductor chip is attached on one of the first and second main surface. A first insulating layer overlying the main surface of the carrier on which the first semiconductor chip is attached and the first semiconductor chip is formed. The carrier is then separated into a plurality of parts along the recess pattern.

摘要翻译： 公开了一种制造层压电子装置的方法。 一个实施例提供载体，载体限定第一主表面和与第一主表面相对的第二主表面。 载体具有形成在第一主表面中的凹陷图案。 第一半导体芯片附接在第一和第二主表面之一上。 覆盖在其上附着有第一半导体芯片的载体的主表面上的第一绝缘层和形成第一半导体芯片。 然后沿着凹槽图案将载体分离成多个部分。

公开(公告)号：US07955901B2

公开(公告)日：2011-06-07

申请号：US11867329

申请日：2007-10-04

申请人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

发明人： Henrik Ewe ,  Stefan Landau ,  Klaus Schiess ,  Robert Bergmann ,  Alvin Wee Beng Tatt ,  Soon Lock Goh ,  Joachim Mahler ,  Boris Plikat ,  Reimund Engl

IPC分类号： H01L23/48

CPC分类号： H01L23/3107 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/24 ,  H01L24/80 ,  H01L24/82 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24246 ,  H01L2224/24998 ,  H01L2224/32245 ,  H01L2224/76155 ,  H01L2224/82007 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A method for producing a power semiconductor module having surface mountable flat external contact areas is disclosed. At least one power semiconductor chip is fixed by its rear side on a drain external contact. An insulation layer covers the top side over the side edges of the semiconductor chip as far as the inner housing plane was a leaving free the source and gate contact areas on the top side of the semiconductor chip and also was partly leaving free the top sides of the corresponding external contacts.

摘要翻译： 公开了一种具有表面安装平坦的外部接触区域的功率半导体模块的制造方法。 至少一个功率半导体芯片由其后侧固定在漏极外部触点上。 绝缘层覆盖半导体芯片的侧边缘上方的顶侧，只要内壳平面离开半导体芯片的顶侧上的源极和栅极接触区域，并且还部分地释放出半导体芯片的顶侧 相应的外部联系人。