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    Integrated circuit (IC) devices including stress inducing layers
    3.
    发明授权
    Integrated circuit (IC) devices including stress inducing layers 有权

    公开(公告)号：US10103142B2

    公开(公告)日：2018-10-16

    申请号：US15076952

    申请日：2016-03-22

    申请人： Sug-hyun Sung ,  Jung-gun You ,  Gi-gwan Park

    发明人： Sug-hyun Sung ,  Jung-gun You ,  Gi-gwan Park

    IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234

    摘要： Integrated circuit devices are provided. The devices may include first and second fin-shaped channel regions protruding from a substrate, and the first and second fin-shaped channel regions may define a recess therebetween. The devices may also include an isolation layer in a lower portion of the recess. The isolation layer may include a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region. The devices may further include a gate insulation layer on surfaces of upper portions of the first and second fin-shaped channel regions and a gate electrode layer on the gate insulation layer.

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20170125597A1

    公开(公告)日：2017-05-04

    申请号：US15295821

    申请日：2016-10-17

    申请人： Sung-Soo KIM ,  Gi-Gwan PARK ,  Song-E KIM ,  Koung-Min RYU ,  Sun-Ki MIN

    发明人： Sung-Soo KIM ,  Gi-Gwan PARK ,  Song-E KIM ,  Koung-Min RYU ,  Sun-Ki MIN

    IPC分类号： H01L29/78 ,  H01L29/417 ,  H01L29/06

    CPC分类号： H01L29/7855 ,  H01L29/0657 ,  H01L29/41791 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/7853 ,  H01L29/7854

    摘要： A semiconductor device is provided which includes a first fin-type pattern including a first side surface and a second side surface opposite to each other, a first trench of a first depth adjacent to the first side surface, a second trench of a second depth adjacent to the second side surface. The second depth differs from the first depth, and a first field insulating film partially fills the first trench and a second field insulating film partially fills the second trench. The first fin-type pattern has a lower portion, and an upper portion having a narrower width than the lower portion, and has a first stepped portion on a boundary between the upper portion and the lower portion. The first field insulating film includes a first lower field insulating film in contact with the lower portion, and a first upper field insulating film in contact with the upper portion.

    Integrated Circuit Device and Method of Manufacturing the Same
    7.
    发明申请
    Integrated Circuit Device and Method of Manufacturing the Same 有权
    集成电路装置及其制造方法

    公开(公告)号：US20160379982A1

    公开(公告)日：2016-12-29

    申请号：US15058696

    申请日：2016-03-02

    申请人： Jung-gun You ,  Gi-gwan Park

    发明人： Jung-gun You ,  Gi-gwan Park

    IPC分类号： H01L27/092 ,  H01L29/417 ,  H01L29/06

    CPC分类号： H01L27/0924 ,  H01L21/28008 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/0657 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7846 ,  H01L29/7848

    摘要： An integrated circuit (IC) device includes a first-fin-type active region, a second-fin-type active region, and an inter-region stepped portion. The first-fin-type active region protrudes from a substrate in a first region of the substrate and has a first width in a first direction. The second-fin-type active region protrudes from the substrate in a second region of the substrate and has a second width in the first direction. The second width is less than the first width. The inter-region stepped portion is formed at an interface between the first region and the second region in a bottom surface, which is a portion of the substrate between the first-fin-type active region and the second-fin-type active region.

    摘要翻译： 集成电路（IC）装置包括第一鳍式有源区，第二鳍型有源区和区间间阶梯部。 第一翅片型有源区从基板的第一区域中的基板突出，并且在第一方向上具有第一宽度。 第二鳍型有源区在衬底的第二区域中从衬底突出，并且在第一方向上具有第二宽度。 第二宽度小于第一宽度。 所述区域间台阶部形成在所述第一翅片型有源区域与所述第二鳍状有源区域之间的所述基板的一部分的底面的所述第一区域与所述第二区域之间的界面处。

    INTEGRATED CIRCUIT (IC) DEVICES INCLUDING STRESS INDUCING LAYERS
    8.
    发明申请
    INTEGRATED CIRCUIT (IC) DEVICES INCLUDING STRESS INDUCING LAYERS 审中-公开
    集成电路（IC）器件，包括应力诱导层

    公开(公告)号：US20160351565A1

    公开(公告)日：2016-12-01

    申请号：US15076952

    申请日：2016-03-22

    申请人： Sug-hyun SUNG ,  Jung-gun YOU ,  Gi-gwan PARK

    发明人： Sug-hyun SUNG ,  Jung-gun YOU ,  Gi-gwan PARK

    IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L29/78

    CPC分类号： H01L27/0886 ,  H01L21/76229 ,  H01L21/823412 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/165 ,  H01L29/66818 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/7848 ,  H01L29/7854

    摘要： Integrated circuit devices are provided. The devices may include first and second fin-shaped channel regions protruding from a substrate, and the first and second fin-shaped channel regions may define a recess therebetween. The devices may also include an isolation layer in a lower portion of the recess. The isolation layer may include a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region. The devices may further include a gate insulation layer on surfaces of upper portions of the first and second fin-shaped channel regions and a gate electrode layer on the gate insulation layer.

    摘要翻译： 提供集成电路设备。 这些装置可以包括从基板突出的第一和第二鳍形通道区域，并且第一和第二鳍状通道区域可以在其间限定凹部。 这些装置还可以包括在凹部的下部中的隔离层。 隔离层可以包括沿着第一鳍状通道区域的一侧延伸的第一应力衬垫，沿着第二鳍状沟道区域的侧面延伸的第二应力衬垫和在第一应力衬垫和侧面之间的绝缘衬垫 并且在第二应力衬垫和第二鳍状沟道区域的侧面之间。 器件还可以包括在第一和第二鳍状沟道区的上部表面上的栅极绝缘层和栅极绝缘层上的栅极电极层。