Integrated circuit (IC) devices including stress inducing layers

    公开(公告)号:US10103142B2

    公开(公告)日:2018-10-16

    申请号:US15076952

    申请日:2016-03-22

    Abstract: Integrated circuit devices are provided. The devices may include first and second fin-shaped channel regions protruding from a substrate, and the first and second fin-shaped channel regions may define a recess therebetween. The devices may also include an isolation layer in a lower portion of the recess. The isolation layer may include a first stress liner extending along a side of the first fin-shaped channel region, a second stress liner extending along a side of the second fin-shaped channel region and an insulation liner between the first stress liner and the side of the first fin-shaped channel region and between the second stress liner and the side of the second fin-shaped channel region. The devices may further include a gate insulation layer on surfaces of upper portions of the first and second fin-shaped channel regions and a gate electrode layer on the gate insulation layer.

    Integrated Circuit Device and Method of Manufacturing the Same
    5.
    发明申请
    Integrated Circuit Device and Method of Manufacturing the Same 有权
    集成电路装置及其制造方法

    公开(公告)号:US20160379982A1

    公开(公告)日:2016-12-29

    申请号:US15058696

    申请日:2016-03-02

    Abstract: An integrated circuit (IC) device includes a first-fin-type active region, a second-fin-type active region, and an inter-region stepped portion. The first-fin-type active region protrudes from a substrate in a first region of the substrate and has a first width in a first direction. The second-fin-type active region protrudes from the substrate in a second region of the substrate and has a second width in the first direction. The second width is less than the first width. The inter-region stepped portion is formed at an interface between the first region and the second region in a bottom surface, which is a portion of the substrate between the first-fin-type active region and the second-fin-type active region.

    Abstract translation: 集成电路(IC)装置包括第一鳍式有源区,第二鳍型有源区和区间间阶梯部。 第一翅片型有源区从基板的第一区域中的基板突出,并且在第一方向上具有第一宽度。 第二鳍型有源区在衬底的第二区域中从衬底突出,并且在第一方向上具有第二宽度。 第二宽度小于第一宽度。 所述区域间台阶部形成在所述第一翅片型有源区域与所述第二鳍状有源区域之间的所述基板的一部分的底面的所述第一区域与所述第二区域之间的界面处。

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