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公开(公告)号:US12230718B2
公开(公告)日:2025-02-18
申请号:US17533588
申请日:2021-11-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Yasuharu Hosaka , Mitsuo Mashiyama , Kenichi Okazaki
IPC: H01L29/786 , H01L29/66 , H10K59/12 , H10K59/121
Abstract: A circuit capable of high-speed operation and a pixel are integrally formed over the same substrate. A first metal oxide film, a first metal film, and an island-shaped first resist mask are formed over a first insulating layer. An island-shaped first metal layer and an island-shaped first oxide semiconductor layer are formed and a part of a top surface of the first insulating layer is exposed; then, the first resist mask is removed. A second metal oxide film, a second metal film, and an island-shaped second resist mask are formed over the first metal layer and the first insulating layer. An island-shaped second metal layer and an island-shaped second oxide semiconductor layer are formed; then, the second resist mask is removed. The first metal layer and the second metal layer are removed.
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公开(公告)号:US12230638B2
公开(公告)日:2025-02-18
申请号:US18216963
申请日:2023-06-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Atsushi Umezaki
IPC: H01L27/12 , H01L29/24 , H01L29/423 , H01L29/786
Abstract: A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.
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公开(公告)号:US12224355B2
公开(公告)日:2025-02-11
申请号:US18504297
申请日:2023-11-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Junichiro Sakata , Jun Koyama
IPC: H01L29/786 , H01L21/02 , H01L27/12 , H01L29/24 , H01L29/66
Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
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公开(公告)号:US12223904B2
公开(公告)日:2025-02-11
申请号:US18569779
申请日:2022-06-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuki Okamoto , Tatsuya Onuki , Hidetomo Kobayashi , Munehiro Kozuma , Takanori Matsuzaki , Susumu Kawashima , Yutaka Okazaki
IPC: G09G3/3233 , H01L27/088 , H01L27/12
Abstract: The invention of the application is the invention regarding a semiconductor device and a method for driving the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element. The first transistor (M2) comprises a back gate, a gate of the first transistor is electrically connected to the first switch (M1), the second switch (M3) and the first capacitor (C1) are positioned between the gate of the first transistor and a source of the first transistor, the back gate of the first transistor is electrically connected to the third switch (M4), the second capacitor (C2) is positioned between the back gate of the first transistor and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch (M6) and a drain of the second transistor (M5), a gate of the second transistor is electrically connected to the fifth switch (M7), the third capacitor (C3) is positioned between the gate of the second transistor and a source of the second transistor, and the source of the second transistor is electrically connected to the display element (61).
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公开(公告)号:US12212873B2
公开(公告)日:2025-01-28
申请号:US18024084
申请日:2021-09-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yusuke Negoro , Hideaki Shishido
Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. The imaging device is formed in such a manner that a first stacked body in which a plurality of devices are stacked and a second stacked body in which a plurality of devices are stacked are bonded to each other. For example, a pixel circuit, a driver circuit of a pixel, and the like can be provided in the first stacked body, and a reading circuit of the pixel circuit, a memory circuit, a driver circuit of the memory circuit, and the like can be provided in the second stacked body. With these structures, the imaging device which is small can be formed. Furthermore, wiring delay or the like can be prevented by stacking circuits, so that high-speed operation can be performed.
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公开(公告)号:US12211539B2
公开(公告)日:2025-01-28
申请号:US18226823
申请日:2023-07-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hajime Kimura , Atsushi Miyaguchi , Yoshiaki Oikawa
IPC: G06N3/04 , G06N3/063 , G06N3/08 , G11C11/405 , H01L29/786 , H10B12/00
Abstract: A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.
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公开(公告)号:US12191313B2
公开(公告)日:2025-01-07
申请号:US18142206
申请日:2023-05-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki
IPC: H01L27/12 , H01L21/02 , H01L27/146 , H01L29/04 , H01L29/08 , H01L29/24 , H01L29/417 , H01L29/66 , H01L29/786 , H10B41/70
Abstract: A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.
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公开(公告)号:US12176810B2
公开(公告)日:2024-12-24
申请号:US17621338
申请日:2020-06-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroki Inoue , Kousuke Sasaki , Yuto Yakubo , Kei Takahashi
IPC: H02M3/156 , H01L27/12 , H01L29/786 , H02H7/18
Abstract: A novel oscillator, an amplifier circuit, an inverter circuit, an amplifier circuit, a battery control circuit, a battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. The semiconductor device includes an oscillator including a first transistor containing a metal oxide, and a second transistor to a fifth transistor, in which a first potential is supplied to a gate of the second transistor and a gate of the third transistor when the first transistor is turned on, and the first potential is held when the first transistor is turned off. The oscillator supplies a first signal based on the first potential to a first circuit. The first circuit performs at least one of shaping and amplification on the first signal. The second transistor and the fourth transistor are connected in series, and the third transistor and the fifth transistor are connected in series. A source or a drain of the third transistor is electrically connected to a gate of the fourth transistor, and a source or a drain of the fourth transistor is electrically connected to the gate of the third transistor.
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公开(公告)号:US12170337B2
公开(公告)日:2024-12-17
申请号:US18133622
申请日:2023-04-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiaki Oikawa , Nobuharu Ohsawa , Masami Jintyou , Yasutaka Nakazawa
Abstract: The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.
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公开(公告)号:US12169701B2
公开(公告)日:2024-12-17
申请号:US18242603
申请日:2023-09-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hajime Kimura , Takahiro Fukutome
Abstract: A multiplier circuit includes a first circuit comprising a first transistor, a second transistor, a first capacitor, and a second capacitor. It further includes a second circuit comprising a third transistor, a fourth transistor, a third capacitor, and a fourth capacitor.
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