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1.发明授权公开(公告)号：US12132057B2
公开(公告)日：2024-10-29
申请号：US17639744
申请日：2020-08-26
IPC分类号： H01L27/12 , H01L29/786 , H10B12/00
CPC分类号： H01L27/1255 , H01L27/1225 , H01L29/78648 , H01L29/7869 , H10B12/00
摘要： A semiconductor device that occupies a small area is provided. The semiconductor device includes a first transistor including a first oxide semiconductor; a second transistor including a second oxide semiconductor; a capacitor element; a first insulator; and a first conductor in contact with a source or a drain of the second transistor. The capacitor element includes a second conductor, a third conductor, and a second insulator. The first transistor, the second transistor, and the first conductor are placed to be embedded in the first insulator. The second conductor is placed in contact with a top surface of the first conductor and a top surface of a gate of the first transistor. The second insulator is placed over the second conductor and the first insulator. The third conductor is placed to cover the second conductor with the second insulator therebetween.
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公开(公告)号：US12125849B2
公开(公告)日：2024-10-22
申请号：US18142064
申请日：2023-05-02
发明人： Shunpei Yamazaki , Hajime Kimura
IPC分类号： H01L23/522 , H01L21/48 , H01L21/56 , H01L21/66 , H01L21/68 , H01L21/768 , H01L23/00 , H01L23/31 , H01L23/495 , H01L23/498 , H01L23/528 , H01L23/532 , H01L25/065 , H01L27/088 , H10B41/27 , H10B43/27
CPC分类号： H01L27/088 , H01L21/76846 , H10B41/27 , H10B43/27
摘要： A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed. The third insulator has a function of accumulating charge. A tunnel current is induced between the second surface of the first semiconductor and the third insulator with the second insulator therebetween by supply of a potential to the second conductor.
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公开(公告)号：US20240337877A1
公开(公告)日：2024-10-10
申请号：US18750016
申请日：2024-06-21
发明人： Hajime Kimura
IPC分类号： G02F1/13357 , G02F1/1362 , G02F1/1368 , G09G3/34 , G09G3/36
CPC分类号： G02F1/133621 , G02F1/136213 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G09G3/3659 , G02F2201/121 , G02F2201/123 , G02F2202/10 , G09G3/342 , G09G3/3655 , G09G3/3688 , G09G2300/0426 , G09G2300/0443 , G09G2300/0842 , G09G2300/0852 , G09G2310/024 , G09G2310/0251 , G09G2310/0297 , G09G2320/0238 , G09G2320/0252 , G09G2320/0257 , G09G2320/0261 , G09G2320/028 , G09G2340/02 , G09G2340/0435 , G09G2340/16
摘要： The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
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公开(公告)号：US12100366B2
公开(公告)日：2024-09-24
申请号：US18212752
申请日：2023-06-22
发明人： Hajime Kimura , Atsushi Umezaki
CPC分类号： G09G3/3648 , G09G3/2096 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2300/0814 , G09G2300/0819 , G09G2320/0209 , G09G2320/0223 , G09G2320/043
摘要： A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
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公开(公告)号：US12080254B2
公开(公告)日：2024-09-03
申请号：US18141029
申请日：2023-04-28
发明人： Hajime Kimura
CPC分类号： G09G3/3607 , G09G3/3406 , G09G3/36 , G09G3/3614 , G09G3/3685 , G09G5/10 , G09G3/3413 , G09G2300/0452 , G09G2320/0233 , H04N5/208
摘要： The resolution of a low-resolution image is made high and a stereoscopic image is displayed. Resolution is made high by super-resolution processing. In this case, the super-resolution processing is performed after edge enhancement processing is performed. Accordingly, a stereoscopic image with high resolution and high quality can be displayed. Alternatively, after image analysis processing is performed, edge enhancement processing and super-resolution processing are concurrently performed. Accordingly, processing time can be shortened.
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公开(公告)号：US12062310B2
公开(公告)日：2024-08-13
申请号：US18092468
申请日：2023-01-03
发明人： Hajime Kimura , Atsushi Umezaki
IPC分类号： G11C19/00 , G02F1/133 , G06F3/038 , G09G3/14 , G09G3/36 , G11C19/28 , H01L27/12 , G09G3/20 , G09G3/3291
CPC分类号： G09G3/14 , G02F1/133 , G06F3/038 , G09G3/3677 , G09G3/3688 , G11C19/28 , H01L27/124 , G09G3/20 , G09G3/3291 , G09G3/36 , G09G3/3614 , G09G3/3674 , G09G2300/0426 , G09G2310/0286 , G09G2320/043
摘要： To suppress degradation of a transistor. A method for driving a liquid crystal display device has a first period and a second period. In the first period, a first transistor and a second transistor are alternately turned on and off repeatedly, and a third transistor and a fourth transistor are turned off. In the second period, the first transistor and the second transistor are turned off, and the third transistor and the fourth transistor are alternately turned on and off repeatedly. Accordingly, the time during which the transistor is on can be reduced, so that degradation of characteristics of the transistor can be suppressed.
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公开(公告)号：US12019335B2
公开(公告)日：2024-06-25
申请号：US18242158
申请日：2023-09-05
发明人： Hajime Kimura
IPC分类号： G02F1/13357 , G02F1/1362 , G02F1/1368 , G09G3/34 , G09G3/36
CPC分类号： G02F1/133621 , G02F1/136213 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G09G3/3659 , G02F2201/121 , G02F2201/123 , G02F2202/10 , G09G3/342 , G09G3/3655 , G09G3/3688 , G09G2300/0426 , G09G2300/0443 , G09G2300/0842 , G09G2300/0852 , G09G2310/024 , G09G2310/0251 , G09G2310/0297 , G09G2320/0238 , G09G2320/0252 , G09G2320/0257 , G09G2320/0261 , G09G2320/028 , G09G2340/02 , G09G2340/0435 , G09G2340/16
摘要： The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
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公开(公告)号：US12013617B2
公开(公告)日：2024-06-18
申请号：US17518001
申请日：2021-11-03
发明人： Hajime Kimura
IPC分类号： G09G3/32 , G02F1/1335 , G02F1/1362 , G09G3/20 , G09G3/3233 , G09G3/36 , G11C19/28 , H10K10/46 , G02F1/13363 , H10K10/20
CPC分类号： G02F1/136286 , G02F1/133528 , G09G3/20 , G09G3/3233 , G09G3/3677 , G11C19/28 , H10K10/482 , G02F1/133638 , G09G2300/0408 , G09G2300/0417 , G09G2300/0847 , G09G2310/0254 , G09G2310/0267 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2320/043 , H10K10/20
摘要： To suppress a malfunction of a circuit due to deterioration in a transistor. In a transistor which continuously outputs signals having certain levels (e.g., L-level signals) in a pixel or a circuit, the direction of current flowing through the transistor is changed (inverted). That is, by changing the level of voltage applied to a first terminal and a second terminal (terminals serving as a source and a drain) every given period, the source and the drain are switched every given period. Specifically, in a portion which successively outputs signals having certain levels (e.g., L-level signals) in a circuit including a transistor, L-level signals having a plurality of different potentials (L-level signals whose potentials are changed every given period) are used as the signals having certain levels.
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公开(公告)号：US11960174B2
公开(公告)日：2024-04-16
申请号：US17876220
申请日：2022-07-28
发明人： Hajime Kimura
IPC分类号： G02F1/1343 , F21V8/00 , G02F1/1368 , G09G3/34 , G09G3/36 , G02F1/1333 , G02F1/1335 , G02F1/13357 , G02F1/1345 , G02F1/1362 , H01L27/12
CPC分类号： G02F1/1343 , G02B6/0051 , G02B6/0055 , G02F1/134363 , G02F1/1368 , G09G3/342 , G09G3/3648 , G02F1/133371 , G02F1/133502 , G02F1/133524 , G02F1/133528 , G02F1/133553 , G02F1/133555 , G02F1/133603 , G02F1/133604 , G02F1/134318 , G02F1/134372 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/136231 , G02F2201/124 , G02F2201/50 , G09G2310/024 , G09G2320/0252 , G09G2340/16 , H01L27/1214 , H01L27/1225
摘要： A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ITO conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased. An object of the present invention is to provide a semiconductor device, a liquid crystal display device, and an electronic appliance each having a wide viewing angle, less numbers of manufacturing steps and masks, and low manufacturing cost compared with a conventional device. A semiconductor layer of a transistor, a pixel electrode, and a common electrode of a liquid crystal element are formed in the same step.
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公开(公告)号：US11943929B2
公开(公告)日：2024-03-26
申请号：US18129120
申请日：2023-03-31
摘要： A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
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