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231 条记录 (耗时 0.026 秒)

    Hybrid phase locked loop having wide locking range
    2.
    发明授权
    Hybrid phase locked loop having wide locking range 有权

    公开(公告)号：US10243572B2

    公开(公告)日：2019-03-26

    申请号：US15364167

    申请日：2016-11-29

    申请人： Microsemi SoC Corporation

    发明人： Prakash Reddy

    IPC分类号： H03L7/00 ,  H03L7/10 ,  H03L7/087 ,  H03L7/093 ,  H03L7/099

    摘要： A digital phased lock loop includes a digital controlled oscillator configured to produce an output signal at an output signal frequency, and a phase comparator configured to compare the output signal or a signal derived from the output signal, with a reference signal at a reference signal frequency or a signal derived from the reference signal to produce a phase error signal. A first loop filter produces a first control signal for the digital controlled oscillator. A frequency error measuring circuit produces a frequency error signal that directly represents a frequency difference between the output signal frequency and the reference signal frequency. A second loop filter produces a second control signal for the digital controlled oscillator from an output of the frequency error measuring circuit. A circuit combines the first and second control signals and providing the combined control signals to the digital controlled oscillator.

    Method and system for synchronizing base station and establishing location
    3.
    发明授权
    Method and system for synchronizing base station and establishing location 有权

    公开(公告)号：US10231080B2

    公开(公告)日：2019-03-12

    申请号：US15495180

    申请日：2017-04-24

    申请人： Microsemi Frequency and Time Corporation

    发明人： George P. Zampetti ,  Christopher A. Reid

    IPC分类号： H04W56/00 ,  H04W4/021 ,  H04W64/00

    摘要： With the increasing usage of mobile devices for communication, the need for wireless base-stations deployed in strategic locations is becoming increasingly important. The increased bandwidths being transmitted between the base-station and the mobile device has mandated that enhanced transmission formats and techniques be deployed, and, in order to operate correctly, these techniques require a tight synchronization in both time/phase, and in frequency, between the various base-stations serving a general area. Due to the need to establish the geographic location of the mobile device with a high degree of accuracy, it is also necessary to establish the location of the serving base-stations with a high degree of accuracy. The invention disclosed herein provides robust and practical methods for synchronizing base-stations, as well as providing for accurate location, by leveraging the usage of global navigation satellite systems receivers in conjunction with network based schemes for packet-based (time/phase/frequency) synchronization.

    System and method for decision feedback equalizer (DFE) adaptation
    4.
    发明授权
    System and method for decision feedback equalizer (DFE) adaptation 有权

    公开(公告)号：US10230552B1

    公开(公告)日：2019-03-12

    申请号：US16046885

    申请日：2018-07-26

    申请人： Microsemi Storage Solutions, Inc.

    发明人： Peter John Waldemar Graumann

    IPC分类号： H04L25/03 ,  H03M9/00

    摘要： A system and method for decision feedback equalizer (DFE) tap adaptation. An input signal is received at a DFE of a receiver, wherein the input signal comprises a serial bit stream of encoded symbols. Data samples and error samples are taken from the input signal and the data samples and the error samples are aligned establish a plurality of pairs of data samples and error samples, wherein the data sample and error sample of each of the plurality of pairs of data samples and error samples are from locations in the serial bit stream of encoded symbols that are known to be uncorrelated with each other. The DFE tap weights are then adjusted based upon the plurality of pairs of data samples and error samples.

    Multi-axial mast positioning system
    6.
    发明授权
    Multi-axial mast positioning system 有权

    公开(公告)号：US10012004B2

    公开(公告)日：2018-07-03

    申请号：US15442552

    申请日：2017-02-24

    申请人： US Tower Corp.

    发明人： Robert E. Gorney ,  Kenneth Pereira ,  Jason Timothy Wadlington

    IPC分类号： E04H12/18 ,  F16M11/42 ,  F16M11/28 ,  F16M11/20

    CPC分类号： E04H12/182 ,  E04H12/18 ,  E04H12/187 ,  E04H12/2284 ,  E04H12/345 ,  F16M11/2057 ,  F16M11/28 ,  F16M11/42 ,  F16M13/022

    摘要： A multi-axial telescoping support structure positioning system includes a frame having first and second opposed vertical sections. An axle is rotatably coupled to the first vertical section of the frame. A first rotary actuator has a first end mounted to the second vertical section of the frame and a second end rotatable with respect to the first end attached to the axle to rotate the axle. A telescoping support structure has a plurality of telescoping sections extendable from a base section along a longitudinal axis. A second rotary actuator is attached to the base section of the telescoping support structure at an intermediate position along the length of the base section and to the axle at a position between the first and second vertical sections of the frame to tilt the telescoping support structure about a tilt axis aligned perpendicular to the longitudinal axis of the telescoping support structure.

    Calibration method and apparatus for phase locked loop circuit
    9.
    发明授权
    Calibration method and apparatus for phase locked loop circuit 有权

    公开(公告)号：US09654121B1

    公开(公告)日：2017-05-16

    申请号：US15169997

    申请日：2016-06-01

    申请人： Integrated Device Technology, Inc.

    发明人： Min Chu

    IPC分类号： H03L7/06 ,  H03L7/099

    CPC分类号： H03L7/0992 ,  H03L7/099 ,  H03L2207/06 ,  H03L2207/50

    摘要： An integrated circuit apparatus for calibrating a phase locked loop (PLL) circuit that includes a phase comparator configured to receive a reference clock signal and a feedback clock signal and generate a phase error signal, a variable frequency oscillator configured for receiving the phase error signal and generating a corresponding fast clock signal at an output of the variable frequency oscillator, and a divider that is configured to divide the fast clock signal by a divisor (N) so as to generate the feedback clock signal, includes a calibration circuit. The calibration circuit is coupled to receive the reference clock signal and the fast clock signal and to provide a frequency band selection signal to the variable frequency oscillator. The calibration circuit includes a counting circuit for counting a number of cycles of the fast clock signal over a period of time defined by a number of cycles (M) of the reference clock signal. The calibration circuit also includes a selection block for performing a convergence test using the counted number of fast clock cycles, N, and M. The selection block generates the frequency band selection signal in accordance with the results of the convergence test to select a next candidate calibrated frequency band.

    System and method for deskewing output clock signals
    10.
    发明授权
    System and method for deskewing output clock signals 有权

    公开(公告)号：US09614508B1

    公开(公告)日：2017-04-04

    申请号：US14958701

    申请日：2015-12-03

    申请人： Integrated Device Technology, Inc.

    发明人： Jagdeep Bal ,  Louis F. Poitras

    IPC分类号： H03L7/00 ,  H03K5/14 ,  H03K5/131

    CPC分类号： H03K5/14 ,  H03K5/131

    摘要： A clock generator having deskewed outputs signals wherein a transit time of each of a plurality of traces coupled to the clock generator outputs are determined and the longest trace is identified as the trace having the longest transit time. A time delay is then added to an output clock signal at each of the clock generator outputs that are not coupled to the longest trace. The addition of the time delay for each of the clock generator outputs is effective in automatically deskewing the clock generator outputs.