公开(公告)号：US09171900B2

公开(公告)日：2015-10-27

申请号：US14454524

申请日：2014-08-07

Applicant: Avogy, Inc.

Inventor： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

IPC: H01L29/868 ,  H01L29/20 ,  H01L21/20 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/868 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/6631 ,  H01L29/66924

Abstract: A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region.

Abstract translation: III族氮化物半导体器件包括用于在III族氮化物半导体器件的正向偏置操作期间支持电流的有源区域。 有源区包括具有第一导电类型的第一III族氮化物外延材料和具有第二导电类型的第二III族氮化物外延材料。 III族氮化物半导体器件还包括物理地邻近有源区的边缘终端区，并且包括包含第一III族氮化物外延材料的一部分的注入区。 第一III族氮化物外延材料的注入区域相对于与注入区域相邻的第一III族氮化物外延材料的部分具有降低的导电性。

公开(公告)号：US09159799B2

公开(公告)日：2015-10-13

申请号：US13866286

申请日：2013-04-19

Applicant: AVOGY, INC.

Inventor： Isik C. Kizilyalli ,  Dave P. Bour ,  Thomas R. Prunty ,  Hui Nie ,  Quentin Diduck ,  Ozgur Aktas

IPC: H01L29/872 ,  H01L29/66 ,  H01L29/20 ,  H01L29/868

CPC classification number: H01L29/66143 ,  H01L29/0619 ,  H01L29/2003 ,  H01L29/66121 ,  H01L29/66212 ,  H01L29/868 ,  H01L29/872

Abstract: A method for fabricating a merged p-i-n Schottky (MPS) diode in gallium nitride (GaN) based materials includes providing an n-type GaN-based substrate having a first surface and a second surface. The method also includes forming an n-type GaN-based epitaxial layer coupled to the first surface of the n-type GaN-based substrate, and forming a p-type GaN-based epitaxial layer coupled to the n-type GaN-based epitaxial layer. The method further includes removing portions of the p-type GaN-based epitaxial layer to form a plurality of dopant sources, and regrowing a GaN-based epitaxial layer including n-type material in regions overlying portions of the n-type GaN-based epitaxial layer, and p-type material in regions overlying the plurality of dopant sources. The method also includes forming a first metallic structure electrically coupled to the regrown GaN-based epitaxial layer.

Abstract translation: 一种用于制造基于氮化镓（GaN）基材料的合并p-i-n肖特基（MPS）二极管的方法包括提供具有第一表面和第二表面的n型GaN基衬底。 该方法还包括形成耦合到n型GaN基衬底的第一表面的n型GaN基外延层，以及形成与n型GaN基外延结合的p型GaN基外延层 层。 该方法还包括去除p型GaN基外延层的部分以形成多个掺杂源，并且在覆盖n型GaN基外延的部分的区域中重新生长包括n型材料的GaN基外延层 层和p型材料在覆盖多个掺杂剂源的区域中。 该方法还包括形成电耦合到再生长的GaN基外延层的第一金属结构。

公开(公告)号：US20150263640A1

公开(公告)日：2015-09-17

申请号：US14574176

申请日：2014-12-17

Applicant: AVOGY, INC.

Inventor： Antoin Russell ,  Alberto Doronzo

IPC: H02M7/06

CPC classification number: H02M7/06 ,  H02M1/32 ,  H02M3/1588 ,  H02M3/33592 ,  H02M7/217 ,  H02M2001/0035 ,  H02M2001/0058 ,  H02M2001/0064 ,  Y02B70/1425 ,  Y02B70/1433 ,  Y02B70/1466 ,  Y02B70/1475 ,  Y02B70/1491 ,  Y02B70/16

Abstract: An embodiment of a resonant converter includes having resonant circuitry having inductive and capacitive elements configured to create electrical resonance when an input voltage is applied and a synchronous rectifier coupled between at least a portion of the resonant circuitry and an output of the resonant converter. The synchronous rectifier includes a diode, and an electrical switch. Control circuitry is configured to operate the electrical switch such that the electrical switch is turned on when there is substantially no voltage across the diode and current flow in the diode is positive in a direction from anode to cathode.

Abstract translation: 谐振转换器的实施例包括具有谐振电路，其具有被配置成当施加输入电压时产生电谐振的电感和电容元件，并且耦合在谐振电路的至少一部分和谐振转换器的输出之间的同步整流器。 同步整流器包括二极管和电开关。 控制电路被配置为操作电开关，使得当二极管上基本上没有电压并且二极管中的电流在从阳极到阴极的方向上是正的时，电开关被接通。

公开(公告)号：US09117850B2

公开(公告)日：2015-08-25

申请号：US14471374

申请日：2014-08-28

Applicant: Avogy, Inc.

Inventor： Don Disney ,  Isik C. Kizilyalli ,  Hui Nie ,  Linda Romano ,  Richard J. Brown ,  Madhan Raj

IPC: H01L21/8234 ,  H01L21/337 ,  H01L29/66 ,  H01L29/808 ,  H01L21/027 ,  H01L21/283 ,  H01L21/308 ,  H01L29/20 ,  H01L29/78

CPC classification number: H01L29/66924 ,  H01L21/027 ,  H01L21/283 ,  H01L21/308 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66446 ,  H01L29/66893 ,  H01L29/66909 ,  H01L29/66916 ,  H01L29/7832 ,  H01L29/808 ,  H01L29/8083 ,  H01L29/8086

Abstract: A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.

Abstract translation: 半导体器件包括III族氮化物衬底，耦合到III族氮化物衬底并具有台面的第一III族氮化物外延层和耦合到台面的顶表面的第二III族氮化物外延层。 半导体器件还包括耦合到台面的侧表面的III族氮化物栅极结构，以及被配置为在第二III族氮化物外延层和III族氮化物栅极结构之间提供电绝缘的间隔物。

公开(公告)号：US20150200268A1

公开(公告)日：2015-07-16

申请号：US14602125

申请日：2015-01-21

Applicant: Avogy, Inc.

Inventor： Madhan M. Raj ,  Brian Alvarez ,  David P. Bour ,  Andrew P. Edwards ,  Hui Nie ,  Isik C. Kizilyalli

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/20

CPC classification number: H01L29/66143 ,  H01L21/0254 ,  H01L21/02664 ,  H01L29/0619 ,  H01L29/2003 ,  H01L29/66121 ,  H01L29/66212 ,  H01L29/872

Abstract: An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.

Abstract translation: MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底，其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构，其包括耦合到衬底的第一侧的第一III族氮化物外延层，其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域，每个部分设置在相邻的突起之间。 第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

公开(公告)号：US20150155775A1

公开(公告)日：2015-06-04

申请号：US14095759

申请日：2013-12-03

Applicant: AVOGY, INC.

Inventor： Hemal N. Shah ,  Vinod Khosla

IPC: H02M1/42 ,  H02M7/06

CPC classification number: H02M1/4208 ,  G05F3/26 ,  H02M1/42 ,  H02M7/06 ,  H02M7/217 ,  Y02B70/126

Abstract: An electrical adapter can include a rectifying circuit configured to receive an AC power input, a power factor corrector (PFC) circuit coupled with an output of the rectifying circuit, and a capacitive component coupled with an output of the PFC circuit. The electrical adapter can further include a DC-DC converter circuit coupled with an output of the capacitive component and configured to provide a power output of the electrical adapter, and an impedance-measuring circuit coupled with the power output and configured to measure impedance of a cable connected to the power output. The DC-DC converter circuit can be configured to adjust power of the power output based on the measured impedance.

Abstract translation: 电适配器可以包括被配置为接收AC电力输入的整流电路，与整流电路的输出耦合的功率因数校正器（PFC）电路以及与PFC电路的输出耦合的电容分量。 电适配器还可以包括与电容性部件的输出耦合并被配置为提供电适配器的功率输出的DC-DC转换器电路，以及与功率输出耦合的阻抗测量电路，并配置成测量 电缆连接到电源输出。 DC-DC转换器电路可以被配置为基于测量的阻抗来调整功率输出的功率。

公开(公告)号：US08937317B2

公开(公告)日：2015-01-20

申请号：US13730619

申请日：2012-12-28

Applicant: Avogy, Inc.

Inventor： Donald R. Disney ,  Hemal N. Shah

IPC: H01L31/0256 ,  H01L27/06 ,  H01L23/00 ,  H01L29/872

CPC classification number: H01L21/50 ,  H01L21/8252 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/2003 ,  H01L29/872 ,  H01L2021/6027 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/0603 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/0665

Abstract: An electronic package includes a leadframe, a plurality of pins, a gallium-nitride (GaN) transistor, and a GaN diode. The GaN transistor includes a drain region, a drift region, a source region, and a gate region; the drain region includes a GaN substrate and a drain contact, the drift region includes a first GaN epitaxial layer coupled to the GaN substrate, the source region includes a source contact and is separated from the GaN substrate by the drift region, and the gate region includes a second GaN epitaxial layer and a gate contact. The GaN diode includes an anode region and a cathode region, the cathode region including the GaN substrate and a cathode contact, and the anode region including a third GaN epitaxial layer coupled to the GaN substrate and an anode contact. The drain contact and the anode contact are electrically connected to the leadframe.

Abstract translation: 电子封装包括引线框，多个引脚，氮化镓（GaN）晶体管和GaN二极管。 GaN晶体管包括漏极区，漂移区，源极区和栅极区; 所述漏极区包括GaN衬底和漏极接触，所述漂移区包括耦合到所述GaN衬底的第一GaN外延层，所述源极区包括源极接触并且通过所述漂移区与所述GaN衬底分离，并且所述栅极区 包括第二GaN外延层和栅极接触。 GaN二极管包括阳极区域和阴极区域，阴极区域包括GaN衬底和阴极接触，并且阳极区域包括耦合到GaN衬底的第三GaN外延层和阳极接触。 漏极触点和阳极触点电连接到引线框架。

公开(公告)号：US20140346527A1

公开(公告)日：2014-11-27

申请号：US14454524

申请日：2014-08-07

Applicant: Avogy, Inc.

Inventor： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown ,  Donald R. Disney

IPC: H01L29/06 ,  H01L29/20 ,  H01L29/868

CPC classification number: H01L29/868 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/66204 ,  H01L29/66212 ,  H01L29/6631 ,  H01L29/66924

Abstract: A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region

Abstract translation: III族氮化物半导体器件包括用于在III族氮化物半导体器件的正向偏置操作期间支持电流的有源区域。 有源区包括具有第一导电类型的第一III族氮化物外延材料和具有第二导电类型的第二III族氮化物外延材料。 III族氮化物半导体器件还包括物理地邻近有源区的边缘终端区，并且包括包含第一III族氮化物外延材料的一部分的注入区。 第一III族氮化物外延材料的注入区域相对于邻近于注入区域的第一III族氮化物外延材料的部分具有降低的导电性

公开(公告)号：US08853063B2

公开(公告)日：2014-10-07

申请号：US14061741

申请日：2013-10-23

Applicant: Avogy, Inc.

Inventor： David P. Bour ,  Thomas R. Prunty ,  Linda Romano ,  Richard J. Brown ,  Isik C. Kizilyalli ,  Hui Nie

IPC: H01L21/20 ,  H01L21/02 ,  H01L29/207 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L21/02636 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66212 ,  H01L29/66446

Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.

Abstract translation: 生长n型III族氮化物基外延层的方法包括在外延生长反应器中提供衬底，形成耦合到衬底表面的一部分的掩模材料，并将第一气体流入外延生长反应器 。 第一种气体包括III族元素和碳。 该方法还包括使第二气体流入外延生长反应器。 第二气体包括V族元素，V族元素与III族元素的摩尔比为至少5,000。 该方法还包括生长n型III族氮化物基外延层。

公开(公告)号：US08823140B2

公开(公告)日：2014-09-02

申请号：US13675916

申请日：2012-11-13

Applicant: Avogy, Inc.

Inventor： Hui Nie ,  Andrew Edwards ,  Isik Kizilyalli ,  Dave Bour

IPC: H01L29/66

CPC classification number: H01L21/04 ,  H01L29/0615 ,  H01L29/2003 ,  H01L29/42304 ,  H01L29/66318 ,  H01L29/732 ,  H01L29/7371

Abstract: An embodiment of a semiconductor device includes a III-nitride base structure of a first conductivity type, and a III-nitride emitter structure of a second conductivity type having a first surface and a second surface. The second surface is substantially opposite the first surface. The first surface of the III-nitride emitter structure is coupled to a surface of the III-nitride base structure. The semiconductor also includes a first dielectric layer coupled to the second surface of the III-nitride emitter structure, and a spacer coupled to a sidewall of the III-nitride emitter structure and the surface of the III-nitride base structure. The semiconductor also includes a base contact structure with a III-nitride material coupled to the spacer, the surface of the III-nitride base structure, and the first dielectric layer, such that the first dielectric layer and the spacer are disposed between the base contact structure and the III-nitride emitter structure.

Abstract translation: 半导体器件的实施例包括第一导电类型的III族氮化物基底结构和具有第一表面和第二表面的第二导电类型的III族氮化物发射极结构。 第二表面基本上与第一表面相对。 III族氮化物发射极结构的第一表面耦合到III族氮化物基底结构的表面。 半导体还包括耦合到III族氮化物发射极结构的第二表面的第一电介质层和耦合到III族氮化物发射极结构的侧壁和III族氮化物基底结构的表面的间隔物。 该半导体还包括具有连接到间隔物，III族氮化物基底结构的表面和第一介电层的III族氮化物材料的基底接触结构，使得第一介电层和间隔物设置在基底触点 结构和III族氮化物发射极结构。