公开(公告)号：US20230232628A1

公开(公告)日：2023-07-20

申请号：US17963320

申请日：2022-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Subin SHIN ,  Sangwon KIM ,  Jeeyong KIM ,  Hyeonjoo SONG ,  Habin LIM

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/528

CPC classification number: H01L27/11582 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/5283

Abstract: A semiconductor device includes a stack structure having gate electrodes and interlayer insulating layers, the stack structure having a cell region and a step region, and the gate electrodes extending in a first direction to have a step shape in the step region, channel structures through the stack structure in the cell region, separation structures through the stack structure and extending in the first direction, and support structures between the separation structures and through the stack structure in the step region. The step region includes first and second regions, the first region closer to the cell region in the first direction than the second region is, the support structures include first and second support structures through the stack structure in the first and second regions, respectively, a maximum width of the first support structure being greater than that of the second support structure.

公开(公告)号：US20230154439A1

公开(公告)日：2023-05-18

申请号：US18094125

申请日：2023-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghun YI ,  Sangwon KIM ,  Youngkook KIM ,  Jeongryeol SEO ,  Sanghoon OH

IPC: G09G5/14 ,  H04B10/114

CPC classification number: G09G5/14 ,  H04B10/1141 ,  G09G2370/06 ,  G09G2370/12

Abstract: A display device and a control method therefor are disclosed. The display device includes: a display; a transmitter configured to transmit an infrared (IR) signal; and one or more processors configured to: control the display to display a multi-screen including a plurality of images based on a plurality of image signals received from a plurality of source devices, each of the plurality of source devices using a same IR protocol; perform, based on a user command indicating a first image from among the plurality of images, a process for selectively controlling a first source device, from among the plurality of source devices, which provides the first image; and transmit an IR signal for selectively controlling the first source device through the transmitter.

公开(公告)号：US20230072863A1

公开(公告)日：2023-03-09

申请号：US17939303

申请日：2022-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu LEE ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Yeonchoo CHO

IPC: H01L27/108

Abstract: A semiconductor element may include a substrate including source and drain regions formed in the substrate apart from each other by a trench, a gate insulating layer covering a bottom surface and a sidewall of the trench, a gate electrode including lower and upper buried portions. The lower buried portion may be in the trench with the gate insulating layer therearound and fill a lower region of the trench. The upper buried portion may be on the lower buried portion with the gate insulating layer therearound and fill an upper region of the trench. The upper buried portion may include a two-dimensional material layer in the trench on an upper surface of the first conductive layer and an upper region of the sidewall of the gate insulating layer, and a second conductive layer in the upper region of the trench and surrounded by the two-dimensional material layer.

公开(公告)号：US20230042792A1

公开(公告)日：2023-02-09

申请号：US17714412

申请日：2022-04-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunghui HONG ,  Sangwon KIM ,  Jeeyong KIM ,  Subin SHIN ,  Habin LIM

IPC: H01L23/535 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11573

Abstract: A peripheral circuit structure may include peripheral circuits and peripheral circuit lines on a semiconductor substrate, a semiconductor layer including cell array and connection regions on the peripheral circuit structure, a stack including electrodes stacked on the semiconductor layer having a stepwise structure on the connection region, and a planarization insulating layer covering the stack, vertical structures on the cell array region penetrating the stack, including a data storage pattern, a dam group including insulating dams on the connection region penetrating the stack, penetration plugs penetrating the insulating dams and connected to respective peripheral circuit lines, the dam group including a first insulating dam farthest from the cell array region, the first insulating dam including first and second sidewall portions spaced apart, a difference between upper and lower thicknesses of the second sidewall portion of the first insulating dam is larger than that of the first sidewall portion.

公开(公告)号：US20220343973A1

公开(公告)日：2022-10-27

申请号：US17505956

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keewon KWON ,  Sewon YUN ,  Sangwon KIM

IPC: G11C11/54 ,  G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34 ,  G06N3/063

Abstract: Disclosed is an electronic device which includes processing elements arranged in rows and columns, word lines connected with the rows of the processing elements, bit lines connected with the columns of the processing elements, body lines connected with the columns of the processing elements, and source lines connected with the rows of the processing elements. Each of the processing elements includes a first terminal connected with a corresponding bit line of the bit lines, a second terminal connected with a corresponding source line of the source lines, a control gate connected with a corresponding word line of the word lines, a floating gate between the control gate and a body, a body terminal connected with a corresponding body line of the body lines, and a capacitive element between the floating gate and the corresponding bit line.

公开(公告)号：US20220316052A1

公开(公告)日：2022-10-06

申请号：US17711147

申请日：2022-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon KIM ,  Kyung-Eun BYUN ,  Yeonchoo CHO ,  Keunwook SHIN ,  Eunkyu LEE ,  Changseok LEE ,  Hyunjae SONG ,  Hyeonjin SHIN ,  Jungsoo YOON ,  Soyoung LEE ,  Hyunseok LIM

IPC: C23C16/26 ,  H01L29/45 ,  H01L21/285 ,  C23C16/511 ,  C23C16/505 ,  C23C16/02

Abstract: Provided are nanocrystalline graphene and a method of forming the same. The nanocrystalline graphene may include a plurality of grains formed by stacking a plurality of graphene sheets and has a grain density of about 500 ea/μm2 or higher and a root-mean-square (RMS) roughness in a range of about 0.1 or more to about 1.0 or less. When the nanocrystalline graphene has a grain density and a RMS roughness with these ranges, nanocrystalline graphene capable of covering the entirety of a large area on a substrate as a thin layer may be provided.

公开(公告)号：US20220283768A1

公开(公告)日：2022-09-08

申请号：US17750609

申请日：2022-05-23

Applicant: SAMSUNG ELECTRONICS CO,. LTD.

Inventor： Sangwon KIM ,  Youngkook Kim ,  Jeongryeol Seo

IPC: G06F3/14 ,  G09G3/20

Abstract: A modular display apparatus may include a docking station having a plurality of spaces; a plurality of back plates provided in the plurality of spaces; a plurality of power boards provided on the plurality of back plates, each power board of the plurality of power boards including an interface including a plurality of pins; a plurality of display apparatuses connected to the interfaces of the plurality of power boards and mounted in the plurality of spaces; and a processor

公开(公告)号：US20220173221A1

公开(公告)日：2022-06-02

申请号：US17398363

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Hyunjae SONG ,  Keunwook SHIN ,  Eunkyu LEE ,  Changseok LEE ,  Yeonchoo CHO ,  Taejin CHOI

IPC: H01L29/45 ,  H01L27/108 ,  H01L29/15 ,  H01L29/40

Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.

公开(公告)号：US20210373838A1

公开(公告)日：2021-12-02

申请号：US17230059

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangwon KIM ,  Youngkook Kim ,  Jeongryeol Seo

IPC: G06F3/14 ,  G09G3/20

Abstract: A modular display apparatus may include a docking station having a plurality of spaces; a plurality of back plates provided in the plurality of spaces; a plurality of power boards provided on the plurality of back plates, each power board of the plurality of power boards including an interface including a plurality of pins; a plurality of display apparatuses connected to the interfaces of the plurality of power boards and mounted in the plurality of spaces; and a processor

公开(公告)号：US20210372786A1

公开(公告)日：2021-12-02

申请号：US17145966

申请日：2021-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu LEE ,  Yeonchoo CHO ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Hyunjae SONG ,  Hyeonjin SHIN

IPC: G01B15/02 ,  H01L21/66 ,  H01L21/285 ,  H01L29/45 ,  G01N23/2208

Abstract: A method of calculating a thickness of a graphene layer and a method of measuring a content of silicon carbide, by using X-ray photoelectron spectroscopy (XPS), are provided. The method of calculating the thickness of the graphene layer, which is directly grown on a silicon substrate, includes measuring the thickness of the graphene layer directly grown on the silicon substrate, by using a ratio between a signal intensity of a photoelectron beam emitted from the graphene layer and a signal intensity of a photoelectron beam emitted from the silicon substrate.