公开(公告)号：US20220085025A1

公开(公告)日：2022-03-17

申请号：US17225601

申请日：2021-04-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunseok LIM ,  Minhyuk CHO ,  Kyung-Eun BYUN ,  Hyeonjin SHIN ,  Kaoru YAMAMOTO ,  Jungsoo YOON ,  Soyoung LEE ,  Geuno JEONG

IPC: H01L27/108

Abstract: A wiring structure includes a first conductive pattern including doped polysilicon on a substrate, an ohmic contact pattern including a metal silicide on the first conductive pattern, an oxidation prevention pattern including a metal silicon nitride on the ohmic contact pattern, a diffusion barrier including graphene on the oxidation prevention pattern, and a second conductive pattern including a metal on the diffusion barrier.

公开(公告)号：US20230163023A1

公开(公告)日：2023-05-25

申请号：US18054970

申请日：2022-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungjoo AN ,  Jungsoo YOON ,  Soyoung LEE ,  Keunwook SHIN

IPC: H01L21/764 ,  H01L21/768 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L21/764 ,  H01L21/7682 ,  H01L27/11556 ,  H01L27/11582

Abstract: A method of fabricating a semiconductor device including a two-dimensional material layer defining an air-gap, and the semiconductor device therefrom are provided. The method of fabricating a semiconductor device, includes forming a structure on a substrate, wherein the structure has an opening; loading the substrate into a process chamber; forming at least one two-dimensional material layer on an upper surface of the structure so as to overlie the opening and form an air-gap, wherein an upper portion of the air-gap is defined by the at least one two-dimensional material layer; and unloading the substrate from the process chamber.

公开(公告)号：US20220316052A1

公开(公告)日：2022-10-06

申请号：US17711147

申请日：2022-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon KIM ,  Kyung-Eun BYUN ,  Yeonchoo CHO ,  Keunwook SHIN ,  Eunkyu LEE ,  Changseok LEE ,  Hyunjae SONG ,  Hyeonjin SHIN ,  Jungsoo YOON ,  Soyoung LEE ,  Hyunseok LIM

IPC: C23C16/26 ,  H01L29/45 ,  H01L21/285 ,  C23C16/511 ,  C23C16/505 ,  C23C16/02

Abstract: Provided are nanocrystalline graphene and a method of forming the same. The nanocrystalline graphene may include a plurality of grains formed by stacking a plurality of graphene sheets and has a grain density of about 500 ea/μm2 or higher and a root-mean-square (RMS) roughness in a range of about 0.1 or more to about 1.0 or less. When the nanocrystalline graphene has a grain density and a RMS roughness with these ranges, nanocrystalline graphene capable of covering the entirety of a large area on a substrate as a thin layer may be provided.

公开(公告)号：US20210313169A1

公开(公告)日：2021-10-07

申请号：US17208216

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae SONG ,  Kaoru YAMAMOTO ,  Changhyun KIM ,  Shuji MORIYA ,  Jungsoo YOON ,  Soyoung LEE ,  Changseok LEE

IPC: H01L21/02 ,  H01L21/428 ,  H01L21/3213 ,  H01J37/32

Abstract: Provided are apparatuses for manufacturing semiconductor devices. An apparatus includes a reaction chamber having a stage to be loaded on a substrate, wherein set plasma is formed over the stage, a plurality of gas supply lines connected to the reaction chamber, flow controllers formed on the plurality of gas supply lines, respectively, to control the amount of a gas supplied to the reaction chamber, and a gas splitter configured to supply a mixed gas to the flow controllers. The apparatus may be a thin film deposition apparatus using plasma and further include a flow control unit connected to the gas splitter and a gas supply source connected to the flow control unit.