公开(公告)号：US20220343973A1

公开(公告)日：2022-10-27

申请号：US17505956

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keewon KWON ,  Sewon YUN ,  Sangwon KIM

IPC: G11C11/54 ,  G11C16/08 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34 ,  G06N3/063

Abstract: Disclosed is an electronic device which includes processing elements arranged in rows and columns, word lines connected with the rows of the processing elements, bit lines connected with the columns of the processing elements, body lines connected with the columns of the processing elements, and source lines connected with the rows of the processing elements. Each of the processing elements includes a first terminal connected with a corresponding bit line of the bit lines, a second terminal connected with a corresponding source line of the source lines, a control gate connected with a corresponding word line of the word lines, a floating gate between the control gate and a body, a body terminal connected with a corresponding body line of the body lines, and a capacitive element between the floating gate and the corresponding bit line.

公开(公告)号：US20230260567A1

公开(公告)日：2023-08-17

申请号：US18167436

申请日：2023-02-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chaehwan PARK ,  Keewon KWON

IPC: G11C11/4091

CPC classification number: G11C11/4091

Abstract: A bit line sense amplifier includes: a first inverter configured to receive an input signal from a bit line via an input terminal and output a first signal to a first node; a second inverter configured to receive the first signal and output a second signal to a second node; a differential amplifier configured to receive the input signal as a positive input, and receive the second signal as a negative input; and a first switch configured to electrically connect the input terminal to the positive input of the differential amplifier and a second switch configured to electrically connect the second node to the negative input of the differential amplifier.