BIT LINE SENSE AMPLIFIER AND BIT LINE SENSING METHOD OF SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20230260567A1

    公开(公告)日:2023-08-17

    申请号:US18167436

    申请日:2023-02-10

    CPC classification number: G11C11/4091

    Abstract: A bit line sense amplifier includes: a first inverter configured to receive an input signal from a bit line via an input terminal and output a first signal to a first node; a second inverter configured to receive the first signal and output a second signal to a second node; a differential amplifier configured to receive the input signal as a positive input, and receive the second signal as a negative input; and a first switch configured to electrically connect the input terminal to the positive input of the differential amplifier and a second switch configured to electrically connect the second node to the negative input of the differential amplifier.

Patent Agency Ranking