公开(公告)号：US11894230B2

公开(公告)日：2024-02-06

申请号：US18101317

申请日：2023-01-25

Applicant: Applied Materials, Inc. ,  National University of Singapore

Inventor： Vicknesh Sahmuganathan ,  Jiteng Gu ,  Eswaranand Venkatasubramanian ,  Kian Ping Loh ,  Abhijit Basu Mallick ,  John Sudijono ,  Zhongxin Chen

IPC: H10B41/27 ,  H01L21/033 ,  H01L21/311

CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H10B41/27 ,  H01L21/31122 ,  H01L21/31144

Abstract: Methods to manufacture integrated circuits are described. Nanocrystalline diamond is used as a hard mask in place of amorphous carbon. Provided is a method of processing a substrate in which nanocrystalline diamond is used as a hard mask, wherein processing methods result in a smooth surface. The method involves two processing parts. Two separate nanocrystalline diamond recipes are combined—the first and second recipes are cycled to achieve a nanocrystalline diamond hard mask having high hardness, high modulus, and a smooth surface. In other embodiments, the first recipe is followed by an inert gas plasma smoothening process and then the first recipe is cycled to achieve a high hardness, a high modulus, and a smooth surface.

公开(公告)号：US20240027912A1

公开(公告)日：2024-01-25

申请号：US17872370

申请日：2022-07-25

Applicant: Applied Materials, Inc.

Inventor： Xinke Wang ,  Zeqing Shen ,  Susmit Singha Roy ,  Abhijit Basu Mallick ,  Bhaskar Jyoti Bhuyan ,  Jiecong Tang ,  John Sudijono ,  Mark Saly

IPC: G03F7/40 ,  G03F7/34

CPC classification number: G03F7/40 ,  G03F7/346

Abstract: Methods of depositing a conformal carbon-containing film on an EUV photoresist to reduce line edge roughness (LER) are described. Exemplary processing methods may include flowing a first precursor over a patterned EUV surface to form a first portion of an initial carbon-containing film on the structure. The methods may include removing a first precursor effluent from the patterned EUV photoresist. A second precursor may then be flowed over the patterned EUV photoresist to react with the first portion of the initial carbon-containing film. The methods may include removing a second precursor effluent from the patterned EUV photoresist. The methods may include etching the substrate to remove a portion of the carbon-containing film and expose a top surface of the patterned surface and expose the substrate between the patterned surfaces.

公开(公告)号：US11848232B2

公开(公告)日：2023-12-19

申请号：US17839170

申请日：2022-06-13

Applicant: Applied Materials, Inc.

Inventor： Xin Liu ,  Fei Wang ,  Rui Cheng ,  Abhijit Basu Mallick ,  Robert Jan Visser

IPC: H01L21/768 ,  C23C16/01 ,  C23C16/24 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02 ,  H01L21/3205 ,  H01L29/06

CPC classification number: H01L21/76837 ,  C23C16/01 ,  C23C16/24 ,  C23C16/45536 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02532 ,  H01L21/32055 ,  H01L29/0649

Abstract: Embodiments of the present disclosure relate to processes for filling trenches. The process includes depositing a first amorphous silicon layer on a surface of a layer and a second amorphous silicon layer in a portion of a trench formed in the layer, and portions of side walls of the trench are exposed. The first amorphous silicon layer is removed. The process further includes depositing a third amorphous silicon layer on the surface of the layer and a fourth amorphous silicon layer on the second amorphous silicon layer. The third amorphous silicon layer is removed. The deposition/removal cyclic processes may be repeated until the trench is filled with amorphous silicon layers. The amorphous silicon layers form a seamless amorphous silicon gap fill in the trench since the amorphous silicon layers are formed from bottom up.

公开(公告)号：US11830729B2

公开(公告)日：2023-11-28

申请号：US17144972

申请日：2021-01-08

Applicant: Applied Materials, Inc.

Inventor： Zeqing Shen ,  Bo Qi ,  Abhijit Basu Mallick ,  Nitin K. Ingle

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  H01L21/02112 ,  H01L21/02205

Abstract: Exemplary methods of semiconductor processing may include providing a boron-and-carbon-and-nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include generating a capacitively-coupled plasma of the boron-and-carbon-and-nitrogen-containing precursor. The methods may include forming a boron-and-carbon-and-nitrogen-containing layer on the substrate. The boron-and-carbon-and-nitrogen-containing layer may be characterized by a dielectric constant below or about 3.5.

公开(公告)号：US20230360967A1

公开(公告)日：2023-11-09

申请号：US17739856

申请日：2022-05-09

Applicant: Applied Materials, Inc.

Inventor： Chandan Das ,  Susmit Singha Roy ,  Supriya Ghosh ,  John Sudijono ,  Abhijit Basu Mallick ,  Jiecong Tang

IPC: H01L21/768 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L21/76843 ,  H01L21/76877 ,  H01L27/11556 ,  H01L27/11582

Abstract: Transition metal dichalcogenide films and methods for depositing transition metal dichalcogenide films on a substrate are described. Methods for converting transition metal oxide films to transition metal dichalcogenide films are also described. The substrate is exposed to a metal precursor and an oxidant to form a transition metal oxide film; the transition metal oxide film is exposed to a chalcogenide precursor to form the transition metal dichalcogenide film.

公开(公告)号：US11791155B2

公开(公告)日：2023-10-17

申请号：US17004262

申请日：2020-08-27

Applicant: Applied Materials, Inc.

Inventor： Huiyuan Wang ,  Susmit Singha Roy ,  Takehito Koshizawa ,  Bo Qi ,  Abhijit Basu Mallick ,  Nitin K. Ingle

IPC: H01L21/02 ,  H01L29/16

CPC classification number: H01L21/02304 ,  H01L21/02236 ,  H01L21/02362 ,  H01L21/02532 ,  H01L29/16

Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 Å. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.

公开(公告)号：US11784042B2

公开(公告)日：2023-10-10

申请号：US17961224

申请日：2022-10-06

Applicant: Applied Materials, Inc.

Inventor： Eswaranand Venkatasubramanian ,  Yang Yang ,  Pramit Manna ,  Kartik Ramaswamy ,  Takehito Koshizawa ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L21/033 ,  C23C16/26

CPC classification number: H01L21/02274 ,  C23C16/26 ,  H01L21/02115 ,  H01L21/0332

Abstract: Embodiments herein provide methods of depositing an amorphous carbon layer using a plasma enhanced chemical vapor deposition (PECVD) process and hard masks formed therefrom. In one embodiment, a method of processing a substrate includes positioning a substrate on a substrate support, the substrate support disposed in a processing volume of a processing chamber, flowing a processing gas comprising a hydrocarbon gas and a diluent gas into the processing volume, maintaining the processing volume at a processing pressure less than about 100 mTorr, igniting and maintaining a deposition plasma of the processing gas by applying a first power to one of one or more power electrodes of the processing chamber, maintaining the substrate support at a processing temperature less than about 350° C., exposing a surface of the substrate to the deposition plasma, and depositing an amorphous carbon layer on the surface of the substrate.

公开(公告)号：US20230260800A1

公开(公告)日：2023-08-17

申请号：US17671938

申请日：2022-02-15

Applicant: Applied Materials, Inc. ,  National University of Singapore

Inventor： Vicknesh Sahmuganathan ,  Eswaranand Venkatasubramanian ,  Jiteng Gu ,  Kian Ping Loh ,  Abhijit Basu Mallick ,  John Sudijono

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31144 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/02205

Abstract: Hard masks and methods of forming hard masks are described. The hard mask has an average roughness less than 10 nm and a modulus greater than or equal to 400 GPa. The method comprises exposing a substrate to a deposition gas comprising a dopant gas or a precursor (solid (e.g. Alkylborane compounds) or liquid (e.g. Borazine)), a carbon gas and argon at a temperature less than or equal to 550 C, and igniting a plasma from the deposition gas to form an ultrananocrystalline diamond film having an average roughness less than 10 nm and a modulus greater than or equal to 400 GPa.

公开(公告)号：US20230235452A1

公开(公告)日：2023-07-27

申请号：US17585755

申请日：2022-01-27

Applicant: Applied Materials, Inc.

Inventor： Sze Chieh Tan ,  Vicknesh Sahmuganathan ,  Eswaranand Venkatasubramanian ,  Abhijit Basu Mallick ,  John Sudijono

IPC: C23C16/27 ,  C23C16/455

CPC classification number: C23C16/279 ,  C23C16/45536 ,  B82Y40/00

Abstract: Methods of depositing a nanocrystalline diamond film are described. The method may be used in the manufacture of integrated circuits. Methods include treating a substrate with a mild plasma to form a treated substrate surface, incubating the treated substrate with a carbon-rich weak plasma to nucleate diamond particles on the treated substrate surface, followed by treating the substrate with a strong plasma to form a nanocrystalline diamond film.

公开(公告)号：US11682554B2

公开(公告)日：2023-06-20

申请号：US17235241

申请日：2021-04-20

Applicant: Applied Materials, Inc.

Inventor： Zeqing Shen ,  Bo Qi ,  Abhijit Basu Mallick

IPC: H01L21/311 ,  H01L21/02 ,  H01J37/32

CPC classification number: H01L21/02167 ,  H01J37/32449 ,  H01L21/02271 ,  H01L21/31116 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32697 ,  H01J37/32715 ,  H01J2237/2007 ,  H01J2237/20214 ,  H01J2237/334

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a boron-containing precursor to the processing region of the semiconductor processing chamber. The methods may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the boron-containing precursor at a temperature above about 250° C. The methods may include forming a silicon-and-carbon-containing layer on the substrate.