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公开(公告)号:US12018364B2
公开(公告)日:2024-06-25
申请号:US17119655
申请日:2020-12-11
Applicant: Applied Materials, Inc.
Inventor: Huiyuan Wang , Susmit Singha Roy , Takehito Koshizawa , Bo Qi , Abhijit Basu Mallick
IPC: C23C16/40
CPC classification number: C23C16/407
Abstract: Methods for forming coating films comprising germanium oxide are disclosed. In some embodiments, the films are super-conformal to a feature on the surface of a substrate. The films are deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the super-conformal film.
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公开(公告)号:US11430801B2
公开(公告)日:2022-08-30
申请号:US17227925
申请日:2021-04-12
Applicant: APPLIED MATERIALS, INC.
Inventor: Takehito Koshizawa , Mukund Srinivasan , Tomohiko Kitajima , Chang Seok Kang , Sung-Kwan Kang , Gill Y. Lee , Susmit Singha Roy
IPC: H01L27/1157 , H01L27/11582
Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
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公开(公告)号:US20220238531A1
公开(公告)日:2022-07-28
申请号:US17720465
申请日:2022-04-14
Applicant: Applied Materials, Inc.
Inventor: Tejinder Singh , Takehito Koshizawa , Abhijit Basu Mallick , Pramit Manna , Nancy Fung , Eswaranand Venkatasubramanian , Ho-Yung David Hwang , Samuel E. Gottheim
IPC: H01L27/108
Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.
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公开(公告)号:US11335690B2
公开(公告)日:2022-05-17
申请号:US17147001
申请日:2021-01-12
Applicant: Applied Materials, Inc.
Inventor: Tejinder Singh , Takehito Koshizawa , Abhijit Basu Mallick , Pramit Manna , Nancy Fung , Eswaranand Venkatasubramanian , Ho-yung David Hwang , Samuel E. Gottheim
IPC: H01L27/10 , H01L21/02 , H01L27/108
Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.
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公开(公告)号:US10998329B2
公开(公告)日:2021-05-04
申请号:US16517956
申请日:2019-07-22
Applicant: APPLIED MATERIALS, INC.
Inventor: Takehito Koshizawa , Mukund Srinivasan , Tomohiko Kitajima , Chang Seok Kang , Sung-Kwan Kang , Gill Y. Lee , Susmit Singha Roy
IPC: H01L27/1157 , H01L27/11582
Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
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公开(公告)号:US12198936B2
公开(公告)日:2025-01-14
申请号:US18242082
申请日:2023-09-05
Applicant: Applied Materials, Inc.
Inventor: Huiyuan Wang , Susmit Singha Roy , Takehito Koshizawa , Bo Qi , Abhijit Basu Mallick
IPC: H01L21/311 , C23C16/40 , C23C16/455 , C23C16/56 , H01L21/02 , H01L21/306 , H01L21/762 , H01L21/768
Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. A process for removal of germanium oxide is also disclosed.
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公开(公告)号:US11791155B2
公开(公告)日:2023-10-17
申请号:US17004262
申请日:2020-08-27
Applicant: Applied Materials, Inc.
Inventor: Huiyuan Wang , Susmit Singha Roy , Takehito Koshizawa , Bo Qi , Abhijit Basu Mallick , Nitin K. Ingle
CPC classification number: H01L21/02304 , H01L21/02236 , H01L21/02362 , H01L21/02532 , H01L29/16
Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 Å. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.
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公开(公告)号:US11784042B2
公开(公告)日:2023-10-10
申请号:US17961224
申请日:2022-10-06
Applicant: Applied Materials, Inc.
Inventor: Eswaranand Venkatasubramanian , Yang Yang , Pramit Manna , Kartik Ramaswamy , Takehito Koshizawa , Abhijit Basu Mallick
IPC: H01L21/02 , H01L21/033 , C23C16/26
CPC classification number: H01L21/02274 , C23C16/26 , H01L21/02115 , H01L21/0332
Abstract: Embodiments herein provide methods of depositing an amorphous carbon layer using a plasma enhanced chemical vapor deposition (PECVD) process and hard masks formed therefrom. In one embodiment, a method of processing a substrate includes positioning a substrate on a substrate support, the substrate support disposed in a processing volume of a processing chamber, flowing a processing gas comprising a hydrocarbon gas and a diluent gas into the processing volume, maintaining the processing volume at a processing pressure less than about 100 mTorr, igniting and maintaining a deposition plasma of the processing gas by applying a first power to one of one or more power electrodes of the processing chamber, maintaining the substrate support at a processing temperature less than about 350° C., exposing a surface of the substrate to the deposition plasma, and depositing an amorphous carbon layer on the surface of the substrate.
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公开(公告)号:US20210082936A1
公开(公告)日:2021-03-18
申请号:US17019334
申请日:2020-09-13
Applicant: Applied Materials, Inc.
Inventor: Takehito Koshizawa
IPC: H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: Electronic devices and methods of forming the electronic devices are described. The electronic devices comprise a plurality of memory holes extending along a first direction through a plurality of alternating oxide and nitride layers. Each memory hole has a core oxide surrounded by a semiconductor material, the semiconductor material surrounded by a dielectric. The memory holes are staggered to provide a plurality of memory hole lines having spaced memory holes so that adjacent memory hole lines have the memory holes in a staggered configuration. A conductive material is on top of the stack of alternating oxide and nitride layers. A dielectric filled cut line extends through the conductive material in a direction across the plurality of memory hole lines. The dielectric filled cut line separates a first memory hole line from an adjacent second memory hole line without disabling the functionality of the memory holes.
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公开(公告)号:US10910381B2
公开(公告)日:2021-02-02
申请号:US16527915
申请日:2019-07-31
Applicant: Applied Materials, Inc.
Inventor: Tejinder Singh , Takehito Koshizawa , Abhijit Basu Mallick , Pramit Manna , Nancy Fung , Eswaranand Venkatasubramanian , Ho-yung David Hwang , Samuel E. Gottheim
IPC: H01L27/10 , H01L21/02 , H01L27/108
Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.
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