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公开(公告)号:US09923059B1
公开(公告)日:2018-03-20
申请号:US15588357
申请日:2017-05-05
Applicant: Silanna Asia Pte Ltd
Inventor: Shanghui Larry Tu , Michael A. Stuber , Befruz Tasbas , Stuart B. Molin , Raymond Jiang
CPC classification number: H01L29/786 , H01L21/4825 , H01L21/4853 , H01L21/743 , H01L21/76898 , H01L21/84 , H01L23/481 , H01L23/4951 , H01L23/49513 , H01L23/49517 , H01L23/49524 , H01L23/49541 , H01L23/49562 , H01L23/49568 , H01L23/49575 , H01L23/5225 , H01L23/535 , H01L24/32 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/84 , H01L25/50 , H01L27/1203 , H01L27/1207 , H01L29/0649 , H01L29/1087 , H01L29/1095 , H01L29/41766 , H01L29/66659 , H01L29/66681 , H01L29/66696 , H01L29/7816 , H01L29/7824 , H01L29/7835 , H01L2224/32245 , H01L2224/4001 , H01L2224/40141 , H01L2224/40245 , H01L2224/48091 , H01L2224/48108 , H01L2224/48247 , H01L2224/73213 , H01L2224/73265 , H01L2924/00
Abstract: In an active layer over a semiconductor substrate, a semiconductor device has a first lateral diffusion field effect transistor (LDFET) that includes a source, a drain, and a gate, and a second LDFET that includes a source, a drain, and a gate. The source of the first LDFET and the drain of the second LDFET are electrically connected to a common node. A first front-side contact and a second front-side contact are formed over the active layer, and a substrate contact electrically connected to the semiconductor substrate is formed. Each of the first front-side contact, the second front-side contact, and the substrate contact is electrically connected to a different respective one of the drain of the first LDFET, the source of the second LDFET, and the common node.
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公开(公告)号:US20170229536A1
公开(公告)日:2017-08-10
申请号:US15494399
申请日:2017-04-21
Applicant: Silanna Asia Pte Ltd
Inventor: Michael A. Stuber , Stuart B. Molin , Jacek Korec , Boyi Yang
IPC: H01L29/06 , H01L29/78 , H01L29/73 , H01L29/739 , H01L29/10 , H01L29/872 , H01L29/8605 , H01L29/94 , H01L21/8249 , H01L29/49 , H01L29/40 , H01L29/861
CPC classification number: H01L29/0626 , H01L21/823437 , H01L21/8249 , H01L27/0629 , H01L27/0635 , H01L27/088 , H01L29/0688 , H01L29/1008 , H01L29/1083 , H01L29/1087 , H01L29/1095 , H01L29/36 , H01L29/402 , H01L29/41766 , H01L29/42304 , H01L29/4236 , H01L29/4933 , H01L29/66181 , H01L29/6625 , H01L29/66265 , H01L29/66659 , H01L29/66681 , H01L29/66696 , H01L29/66704 , H01L29/7302 , H01L29/7313 , H01L29/7317 , H01L29/735 , H01L29/7391 , H01L29/7821 , H01L29/7824 , H01L29/7825 , H01L29/7835 , H01L29/8605 , H01L29/861 , H01L29/872 , H01L29/945 , H01L2224/0401 , H01L2224/05569 , H01L2224/05572 , H01L2224/11 , H01L2224/13 , H01L2924/00014 , H01L2924/12032 , H01L2924/1305 , H01L2924/13062 , H01L2924/13091 , H01L2924/00 , H01L2224/05552
Abstract: A metal-oxide-semiconductor field-effect transistor (MOSFET) power device includes an active region formed on a bulk semiconductor substrate, the active region having a first conductivity type formed on at least a portion of the bulk semiconductor substrate. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.
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53.
公开(公告)号:US12159815B2
公开(公告)日:2024-12-03
申请号:US17660721
申请日:2022-04-26
Applicant: Silanna Asia Pte Ltd
Inventor: Shanghui Larry Tu , Michael A. Stuber , Befruz Tasbas , Stuart B. Molin , Raymond Jiang
IPC: H01L23/495 , H01L23/535 , H01L23/66 , H01L27/12 , H01L29/06 , H01L29/417 , H01L29/66 , H01L29/78 , H01L29/786 , H01L21/8234 , H01L27/088 , H01L29/08 , H01L29/40
Abstract: A semiconductor package includes a leadframe having an electrically conductive paddle, electrically conductive perimeter package leads, a first electrically conductive clip electrically connected to a first set of the package leads, and a second electrically conductive clip electrically connected to a second set of the package leads. The semiconductor package includes a single semiconductor die. The die includes a front-side active layer having an integrated power structure of two or more transistors. The die includes a backside portion having a backside contact electrically coupled to at least one of the two or more transistors and to the paddle. One or more first front-side contacts of the die are electrically coupled to at least one of the transistors and to the first clip, and one or more second front-side contacts of the die are electrically coupled to at least one of the transistors and to the second clip.
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公开(公告)号:US12149048B2
公开(公告)日:2024-11-19
申请号:US18392406
申请日:2023-12-21
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
IPC: H01S5/042 , H03K17/687 , H03K19/20
Abstract: A pulsed laser diode driver includes a refresh circuit configured to generate a refresh current using a received input voltage. A current amplitude of the refresh current is controlled by the refresh circuit based on a voltage level of a source voltage received by the refresh circuit. A source capacitor of the pulsed laser diode driver is configured to receive the refresh current and to develop the source voltage therefrom. An inductor of the pulsed laser diode driver has a first terminal that is directly electrically connected to the source capacitor. One or more switches of the pulsed laser diode driver are configured to control a current flow through the inductor to produce a high-current pulse through a laser diode that corresponds to a peak current of a resonant waveform developed at an anode of the laser diode.
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公开(公告)号:US20240146022A1
公开(公告)日:2024-05-02
申请号:US18392406
申请日:2023-12-21
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
IPC: H01S5/042 , H03K17/687
CPC classification number: H01S5/0428 , H03K17/6871 , H03K19/20
Abstract: A pulsed laser diode driver includes a refresh circuit configured to generate a refresh current using a received input voltage. A current amplitude of the refresh current is controlled by the refresh circuit based on a voltage level of a source voltage received by the refresh circuit. A source capacitor of the pulsed laser diode driver is configured to receive the refresh current and to develop the source voltage therefrom. An inductor of the pulsed laser diode driver has a first terminal that is directly electrically connected to the source capacitor. One or more switches of the pulsed laser diode driver are configured to control a current flow through the inductor to produce a high-current pulse through a laser diode that corresponds to a peak current of a resonant waveform developed at an anode of the laser diode.
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公开(公告)号:US11901697B2
公开(公告)日:2024-02-13
申请号:US17661184
申请日:2022-04-28
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
IPC: H01S5/042 , H03K17/687
CPC classification number: H01S5/0428 , H03K17/6871
Abstract: A pulsed laser diode driver includes multiple resonant laser diode driver cells, each cell including an inductor having a first inductor terminal to receive a source voltage, a source capacitor coupled between the first inductor terminal and ground, a bypass capacitor having a first terminal connected to the first inductor terminal and a second terminal connected to a second inductor terminal, a laser diode having a cathode that is connected to the first inductor terminal and an anode that is connected to the second inductor terminal, and a bypass switch connected between the second inductor terminal and ground. Each cell's bypass switch is configured to control a current flow through that cell's respective inductor to produce a high-current pulse through that cell's laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at the anode of that cell's laser diode.
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公开(公告)号:US20230318258A1
公开(公告)日:2023-10-05
申请号:US17657973
申请日:2022-04-05
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
CPC classification number: H01S5/0428 , H01S5/06808 , H01S5/0261
Abstract: A pulsed laser diode driver includes an inductor having a first terminal to receive a source voltage, and a second terminal, a source capacitor coupled between the first terminal of the inductor and ground, a bypass capacitor having a first terminal connected to the first terminal of the inductor and a second terminal connected to the second terminal of the inductor, a laser diode having a cathode that is connected to the first terminal of the inductor and an anode that is connected to the second terminal of the inductor, and a bypass switch connected between the second terminal of the inductor and ground. The bypass switch is configured to control a current flow through the inductor to produce a high-current pulse through the laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at the anode of the laser diode.
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公开(公告)号:US11777481B2
公开(公告)日:2023-10-03
申请号:US17823019
申请日:2022-08-29
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
CPC classification number: H03K5/134 , H03K5/13 , H03K2005/00202
Abstract: In a delay circuit, first and second sets of transistors are connected in series between a supply voltage and a ground. The first and second sets of transistors both include a current source transistor, a cascode transistor, and a control transistor. The first set of transistors generates a current that charges a capacitor to generate a ramp signal with a positive slope. A first bias transistor may cause the ramp signal to be biased to ground upon activating the first set of transistors. The second set of transistors generates a current that discharges the capacitor to generate the ramp signal with a negative slope. A second bias transistor may cause the ramp signal to be biased to the supply voltage upon activating the second set of transistors. The delay circuit transitions the state of the output signal based on a voltage level of the ramp signal.
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公开(公告)号:US20230283045A1
公开(公告)日:2023-09-07
申请号:US17653349
申请日:2022-03-03
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
IPC: H01S5/042 , H03K17/687
CPC classification number: H01S5/0428 , H03K17/6871 , H03K19/20
Abstract: A pulsed laser diode driver includes a refresh circuit configured to generate a refresh current using a received input voltage. A current amplitude of the refresh current is controlled by the refresh circuit based on a voltage level of a source voltage received by the refresh circuit. A source capacitor of the pulsed laser diode driver is configured to receive the refresh current and to develop the source voltage therefrom. An inductor of the pulsed laser diode driver has a first terminal that is directly electrically connected to the source capacitor. One or more switches of the pulsed laser diode driver are configured to control a current flow through the inductor to produce a high-current pulse through a laser diode that corresponds to a peak current of a resonant waveform developed at an anode of the laser diode.
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公开(公告)号:US20230275397A1
公开(公告)日:2023-08-31
申请号:US18185962
申请日:2023-03-17
Applicant: Silanna Asia Pte Ltd
Inventor: Joseph H. Colles , Steven E. Rosenbaum , Stuart B. Molin
CPC classification number: H01S5/0261 , H01S5/0428 , H01S5/4025 , H01S5/06808
Abstract: A pulsed laser diode driver includes an inductor having a first terminal configured to receive a source voltage. A source capacitor has a first terminal connected to the first terminal of the inductor to provide the source voltage. A bypass switch has a drain node connected to a second terminal of the inductor and to a first terminal of a bypass capacitor. A laser diode switch has a drain node connected to the second terminal of the inductor. A laser diode has an anode connected to a source node of the laser diode switch and a cathode connected to a bias voltage node. The laser diode switch and the bypass switch control a current flow through the inductor to produce a high-current pulse through the laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at the anode of the laser diode.
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