公开(公告)号：US08586998B2

公开(公告)日：2013-11-19

申请号：US13557749

申请日：2012-07-25

申请人： Hiroki Inoue ,  Keiji Ishibashi ,  Shinsuke Fujiwara

发明人： Hiroki Inoue ,  Keiji Ishibashi ,  Shinsuke Fujiwara

IPC分类号： H01L29/38

CPC分类号： H01L21/02019 ,  H01L21/02013 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7802

摘要： Silicon carbide single crystal is prepared. Using the silicon carbide single crystal as a material, a silicon carbide substrate having a first face and a second face located at a side opposite to the first face is formed. In the formation of the silicon carbide substrate, a first processed damage layer and a second processed damage layer are formed at the first face and second face, respectively. The first face is polished such that at least a portion of the first processed damage layer is removed and the surface roughness of the first face becomes less than or equal to 5 nm. At least a portion of the second processed damage layer is removed while maintaining the surface roughness of the second plane greater than or equal to 10 nm.

摘要翻译： 制备碳化硅单晶。 使用碳化硅单晶作为材料，形成具有位于与第一面相反的一侧的第一面和第二面的碳化硅衬底。 在形成碳化硅衬底时，分别在第一面和第二面上形成第一加工损伤层和第二处理损伤层。 抛光第一面使得第一经处理的损伤层的至少一部分被去除并且第一面的表面粗糙度变得小于或等于5nm。 第二处理的损伤层的至少一部分被去除，同时保持第二平面的表面粗糙度大于或等于10nm。

公开(公告)号：US08415180B2

公开(公告)日：2013-04-09

申请号：US13318039

申请日：2010-03-01

申请人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

发明人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

IPC分类号： H01L21/00

CPC分类号： C23C16/0227 ,  C23C16/0272 ,  C23C16/303 ,  C30B25/183 ,  C30B29/406 ,  H01L33/007

摘要： Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

摘要翻译： 本发明提供一种制造晶片产品的方法，该晶片产品包括在氧化镓衬底上生长的有源层并且能够提高发光强度。 在步骤S105中，在氧化镓衬底11的主表面11a上以600摄氏度生长由诸如GaN，AlGaN或AlN的III族氮化物构成的缓冲层13.在缓冲层13生长之后，同时 将含有氢和氮的气体G2供给到生长反应器10中，将氧化镓衬底11和缓冲层13在生长反应器11中的气氛中以1050摄氏度暴露。 在改性缓冲层上生长III族氮化物半导体层15。 改性缓冲层包括例如空隙。 III族氮化物半导体层15可以由GaN和AlGaN构成。 当由这些材料形成III族氮化物半导体层15时，在改性缓冲层14上获得优异的晶体质量。

公开(公告)号：US20130056752A1

公开(公告)日：2013-03-07

申请号：US13599278

申请日：2012-08-30

申请人： Shinsuke Fujiwara ,  Shin Harada

发明人： Shinsuke Fujiwara ,  Shin Harada

IPC分类号： H01L29/38 ,  H01L21/78

CPC分类号： H01L29/1608 ,  H01L21/02002 ,  H01L21/02439 ,  H01L21/02494 ,  H01L21/02516 ,  H01L21/02529 ,  H01L21/02609 ,  H01L21/02658 ,  H01L21/046 ,  H01L21/049 ,  H01L29/045 ,  H01L29/66068 ,  H01L29/7802

摘要： An edge region has a width of 5 mm. A valid region is surrounded by the edge region, and has an area greater than or equal to 100 cm2. At the valid region, a micropipe having a cross-sectional area exceeding 1 μm2 is not present. The valid region includes a plurality of high-quality regions occupying 70% or more of the valid region. Each of the plurality of high-quality regions has a square shape, an area greater than or equal to 1 cm2, and a micropipe density less than or equal to 1 micropipe per 1 cm2.

摘要翻译： 边缘区域的宽度为5mm。 有效区域由边缘区域包围，并且具有大于或等于100cm 2的面积。 在有效区域，不存在横截面积超过1μm2的微管。 有效区域包括占有效区域的70％以上的多个高质量区域。 多个高质量区域中的每一个具有正方形形状，大于或等于1cm 2的面积，以及每1cm2小于或等于1个微管的微管密度。

公开(公告)号：US08361226B2

公开(公告)日：2013-01-29

申请号：US12067936

申请日：2007-03-22

申请人： Michimasa Miyanaga ,  Naho Mizuhara ,  Shinsuke Fujiwara ,  Hideaki Nakahata ,  Tomohiro Kawase

发明人： Michimasa Miyanaga ,  Naho Mizuhara ,  Shinsuke Fujiwara ,  Hideaki Nakahata ,  Tomohiro Kawase

IPC分类号： C30B21/02

CPC分类号： C30B29/403 ,  C30B23/00

摘要： This III-nitride single-crystal growth method, being a method of growing a AlxGa1-xN single crystal (4) by sublimation, is furnished with a step of placing source material (1) in a crucible (12), and a step of sublimating the source material (1) to grow AlxGa1-xN (0

摘要翻译： 作为通过升华生长Al x Ga 1-x N单晶（4）的方法的III族氮化物单晶生长方法具有将源材料（1）放置在坩埚（12）中的步骤，并且 使源材料（1）升华以在坩埚（12）中生长Al x Ga 1-x N（0

公开(公告)号：US20120061687A1

公开(公告)日：2012-03-15

申请号：US13319599

申请日：2010-04-27

申请人： Shin Harada ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Shin Harada ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/16

CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

摘要： A silicon carbide substrate, which allows for reduced resistivity in the thickness direction thereof while restraining stacking faults from being produced due to heat treatment, includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on one main surface of the base layer. The base layer has an impurity concentration greater than 2×1019 cm−3. Further, the SiC layer has an impurity concentration greater than 5×1018 cm−3 and smaller than 2×1019 cm−3.

摘要翻译： 一种碳化硅衬底，其允许在其抑制由于热处理而产生的堆垛层错的同时在其厚度方向上具有降低的电阻率，包括：由碳化硅制成的基底层; 以及由单晶碳化硅制成并设置在基层的一个主表面上的SiC层。 基层的杂质浓度大于2×10 19 cm -3。 此外，SiC层的杂质浓度大于5×10 18 cm -3，小于2×10 19 cm -3。

公开(公告)号：US20120056203A1

公开(公告)日：2012-03-08

申请号：US13320250

申请日：2010-04-27

申请人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

发明人： Kazuhiro Fujikawa ,  Shin Harada ,  Taro Nishiguchi ,  Makoto Sasaki ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC分类号： H01L29/12

CPC分类号： H01L29/1608 ,  H01L29/32 ,  H01L29/66068 ,  H01L29/808

摘要： A JFET, which is a semiconductor device allowing for reduced manufacturing cost, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source electrode disposed on the active layer; and a drain electrode formed on the active layer and separated from the source electrode. The silicon carbide substrate includes: a base layer made of single-crystal silicon carbide, and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The SiC layer has a defect density smaller than that of the base layer.

摘要翻译： 作为允许降低制造成本的半导体器件的JFET包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在所述有源层上的源电极; 以及形成在有源层上并与源电极分离的漏电极。 碳化硅基板包括：由单晶碳化硅制成的基底层和由单晶碳化硅制成并设置在基底层上的SiC层。 SiC层的缺陷密度小于基底层的缺陷密度。

公开(公告)号：US20120056201A1

公开(公告)日：2012-03-08

申请号：US13320243

申请日：2010-04-27

申请人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Taro Nishiguchi ,  Makoto Sasaki ,  Shinsuke Fujiwara ,  Yasuo Namikawa

发明人： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Taro Nishiguchi ,  Makoto Sasaki ,  Shinsuke Fujiwara ,  Yasuo Namikawa

IPC分类号： H01L29/739

CPC分类号： H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

摘要： An IGBT, which is a vertical type IGBT allowing for reduced on-resistance while restraining defects from being produced, includes: a silicon carbide substrate, a drift layer, a well region, an n+ region, an emitter contact electrode, a gate oxide film, a gate electrode, and a collector electrode. The silicon carbide substrate includes: a base layer made of silicon carbide and having p type conductivity; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. The base layer has a p type impurity concentration exceeding 1×1018 cm−3.

摘要翻译： IGBT是一种允许在抑制缺陷产生的同时降低导通电阻的垂直型IGBT，包括：碳化硅衬底，漂移层，阱区，n +区，发射极接触电极，栅极氧化膜 ，栅电极和集电极。 碳化硅基板包括：由碳化硅制成并具有p型导电性的基底层; 以及由单晶碳化硅制成并设置在基底层上的SiC层。 基极层的p型杂质浓度超过1×1018cm-3。

公开(公告)号：US20120034149A1

公开(公告)日：2012-02-09

申请号：US13235989

申请日：2011-09-19

申请人： Shinsuke Fujiwara ,  Koji Uematsu ,  Hitoshi Kasai ,  Takuji Okahisa

发明人： Shinsuke Fujiwara ,  Koji Uematsu ,  Hitoshi Kasai ,  Takuji Okahisa

IPC分类号： C01B21/06 ,  C30B25/02

CPC分类号： H01L33/325 ,  C30B25/02 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02609 ,  H01L21/02664

摘要： The invention relates to a GaN-crystal free-standing substrate obtained from a GaN crystal grown by HVPE with a (0001) plane serving as a crystal growth plane and at least one plane of a {10-11} plane and a {11-22} plane serving as a crystal growth plane that constitutes a facet crystal region, except for the side surface of the crystal, wherein the (0001)-plane-growth crystal region has a carbon concentration of 5×1016 atoms/cm3 or less, a silicon concentration of 5×1017 atoms/cm3 or more and 2×1018 atoms/cm3 or less, and an oxygen concentration of 1×1017 atoms/cm3 or less; and the facet crystal region has a carbon concentration of 3×1016 atoms/cm3 or less, a silicon concentration of 5×1017 atoms/cm3 or less, and an oxygen concentration of 5×1017 atoms/cm3 or more and 5×1018 atoms/cm3 or less.

摘要翻译： 本发明涉及由具有（0001）面作为晶体生长面的HVPE生长的GaN晶体和{10-11}面和{11-11面]的至少一个平面而获得的GaN结晶自立式基板， （0001）平面生长晶体区域的碳浓度为5×1016原子/ cm3以下的构成除了晶体侧面以外的构成晶面区域的晶体生长面， 硅浓度为5×10 17原子/ cm 3以上且2×10 18原子/ cm 3以下，氧浓度为1×10 17原子/ cm 3以下。 并且小面晶体区域的碳浓度为3×1016原子/ cm3以下，硅浓度为5×10 17原子/ cm 3以下，氧浓度为5×10 17原子/ cm 3以上且5×10 18原子 / cm3以下。

公开(公告)号：US20120003770A1

公开(公告)日：2012-01-05

申请号：US13202419

申请日：2010-02-10

申请人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

发明人： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

IPC分类号： H01L21/20 ,  H01L33/32 ,  B82Y40/00

CPC分类号： H01L21/0262 ,  C30B25/02 ,  C30B29/16 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L33/007

摘要： A method for forming an epitaxial wafer is provided as one enabling growth of a gallium nitride based semiconductor with good crystal quality on a gallium oxide region. In step S107, an AlN buffer layer 13 is grown. In step S108, at a time t5, a source gas G1 containing hydrogen, trimethylaluminum, and ammonia, in addition to nitrogen, is supplied into a growth reactor 10 to grow the AlN buffer layer 13 on a primary surface 11a. The AlN buffer layer 13 is so called a low-temperature buffer layer. After a start of film formation of the buffer layer 13, in step S109 supply of hydrogen (H2) is started at a time t6. At the time t6, H2, N2, TMA, and NH3 are supplied into the growth reactor 10. A supply amount of hydrogen is increased between times t6 and t7, and at the time t7 the increase of hydrogen is terminated to supply a constant amount of hydrogen. At the time t7, H2, TMA, and NH3 are supplied into the growth reactor 10.

摘要翻译： 提供了一种用于形成外延晶片的方法，其可以在氧化镓区域上使得能够以良好的晶体质量生长氮化镓基半导体。 在步骤S107中，生长AlN缓冲层13。 在步骤S108中，在时刻t5，将除了氮以外的氢，三甲基铝和氨的原料气G1供给到生长反应器10中，以在主面11a上生长AlN缓冲层13。 AlN缓冲层13被称为低温缓冲层。 在开始形成缓冲层13之后，在步骤S109中，在时刻t6开始供给氢（H2）。 在时间t6，H2，N2，TMA和NH3被供应到生长反应器10中。在时间t6和t7之间，氢的供应量增加，而在时间t7，氢的增加被终止以提供恒定的量 的氢。 在时间t7，将H2，TMA和NH3供应到生长反应器10中。

公开(公告)号：US07964477B2

公开(公告)日：2011-06-21

申请号：US12470493

申请日：2009-05-22

申请人： Shinsuke Fujiwara

发明人： Shinsuke Fujiwara

IPC分类号： H01L21/205 ,  H01L21/208

CPC分类号： C30B25/20 ,  C30B9/04 ,  C30B19/02 ,  C30B19/12 ,  C30B29/403

摘要： Affords III-nitride crystals having a major surface whose variance in crystallographic plane orientation with respect to an {hkil} plane chosen exclusive of the {0001} form is minimal. A method of manufacturing the III-nitride crystal is one of: conditioning a plurality of crystal plates (10) in which the deviation in crystallographic plane orientation in any given point on the major face (10m) of the crystal plates (10), with respect to an {hkil} plane chosen exclusive of the {0001} form, is not greater than 0.5°; arranging the plurality of crystal plates (10) in a manner such that the plane-orientation deviation, with respect to the {hkil} plane, in any given point on the major-face (10m) collective surface (10a) of the plurality of crystal plates (10) will be not greater than 0.5°, and such that at least a portion of the major face (10m) of the crystal plates (10) is exposed; and growing second III-nitride crystal (20) onto the exposed areas of the major faces (10m) of the plurality of crystal plates (10).

摘要翻译： 提供具有主表面的III族氮化物晶体，其结晶面取向相对于{0001}形式选择的{hkil}平面的方差最小。 制造III族氮化物晶体的方法之一是调节多个晶体板（10），其中在晶体板（10）的主面（10m）上的任何给定点上的晶面取向偏离， 相对于{0001}形式选择的{hkil}平面不大于0.5°; 以这样的方式布置多个晶体板（10），使得相对于{hkil}平面的平面取向偏移在多个晶体板的主面（10m）集体表面（10a）上的任何给定点 晶体板（10）将不大于0.5°，并且使得晶片（10）的主面（10m）的至少一部分露出; 以及在多个晶体板（10）的主面（10μm）的暴露区域上生长第二III族氮化物晶体（20）。