INCREASED BANDWIDTH OF ORDERED STORES IN A NON-UNIFORM MEMORY SUBSYSTEM
    41.
    发明申请
    INCREASED BANDWIDTH OF ORDERED STORES IN A NON-UNIFORM MEMORY SUBSYSTEM 审中-公开
    非均匀存储器子系统中有序存储的带宽增加

    公开(公告)号:US20160124854A1

    公开(公告)日:2016-05-05

    申请号:US14533579

    申请日:2014-11-05

    Abstract: A method, computer program product, and system for maintaining a proper ordering of a data steam that includes two or more sequentially ordered stores, the data stream being moved to a destination memory device, the two or more sequentially ordered stores including at least a first store and a second store, wherein the first store is rejected by the destination memory device. A computer-implemented method includes sending the first store to the destination memory device. A conditional request is sent to the destination memory device for approval to send the second store to the destination memory device, the conditional request dependent upon successful completion of the first store. The second store is cancelled responsive to receiving a reject response corresponding to the first store.

    Abstract translation: 一种方法,计算机程序产品和系统,用于维持包括两个或多个顺序排列的存储器的数据流的正确排序,所述数据流被移动到目的地存储器设备,所述两个或多个顺序排序的存储器至少包括第一 存储和第二存储,其中第一存储被目的地存储设备拒绝。 计算机实现的方法包括将第一存储发送到目的地存储设备。 将条件请求发送到目的地存储器设备以批准将第二存储发送到目的地存储器设备,该条件请求取决于第一存储器的成功完成。 响应于接收到对应于第一商店的拒绝响应,第二商店被取消。

    Dynamic evaluation and adaption of hardware hash functions
    42.
    发明授权
    Dynamic evaluation and adaption of hardware hash functions 有权
    硬件哈希函数的动态评估和适应

    公开(公告)号:US09274800B2

    公开(公告)日:2016-03-01

    申请号:US14060900

    申请日:2013-10-23

    Abstract: Creating hash values based on bit values of an input vector. An apparatus includes a first and a second hash table, a first and second hash function generator adapted to configure a respective hash function for a creation of a first and second hash value based on the bit values of the input vector. The hash values are stored in the respective hash tables. An evaluation unit includes a comparison unit to compare a respective effectiveness of the first hash function and the second hash function, and an exchanging unit responsive to the comparison unit adapted to replace the first hash function by the second hash function.

    Abstract translation: 基于输入向量的位值创建哈希值。 一种装置包括第一和第二散列表,第一和第二散列函数发生器,其适于基于输入向量的位值来配置用于创建第一和第二散列值的相应散列函数。 哈希值存储在相应的散列表中。 评估单元包括比较单元,用于比较第一散列函数和第二散列函数的相应有效性,以及响应于比较单元的交换单元,适于通过第二散列函数来替换第一散列函数。

    RESOURCE ALLOCATION BY VIRTUAL CHANNEL MANAGEMENT AND BUS MULTIPLEXING
    43.
    发明申请
    RESOURCE ALLOCATION BY VIRTUAL CHANNEL MANAGEMENT AND BUS MULTIPLEXING 有权
    通过虚拟通道管理和总线多路复用进行资源分配

    公开(公告)号:US20150154139A1

    公开(公告)日:2015-06-04

    申请号:US14096574

    申请日:2013-12-04

    Abstract: According to embodiments of the invention, methods, computer system, and apparatus for virtual channel management and bus multiplexing are disclosed. The method may include establishing a virtual channel from a first device to a second device via a bus, the bus having a first bus capacity and a second bus capacity, the second bus capacity having greater capacity than the first bus capacity, determining whether a store command is issued for the first bus capacity, determining whether the first bus capacity is available, and allocating the second bus capacity and marking the second bus capacity as unavailable in response to the store command if the first bus capacity is unavailable.

    Abstract translation: 根据本发明的实施例,公开了用于虚拟信道管理和总线复用的方法,计算机系统和装置。 该方法可以包括经由总线建立从第一设备到第二设备的虚拟通道,总线具有第一总线容量和第二总线容量,第二总线容量具有比第一总线容量更大的容量,确定存储 发出第一总线容量的命令,确定第一总线容量是否可用,并且如果第一总线容量不可用,则分配第二总线容量并且响应于存储命令将第二总线容量标记为不可用。

    WRITE AND READ COLLISION AVOIDANCE IN SINGLE PORT MEMORY DEVICES

    公开(公告)号:US20150149716A1

    公开(公告)日:2015-05-28

    申请号:US14308100

    申请日:2014-06-18

    Abstract: A method of avoiding a write collision in single port memory devices from two independent write operations is described. A first data object from a first write operation is divided into a first even sub-data object and first odd sub-data object. A second data object from a second write operation is divided into a second even sub-data object and a second odd sub-data object. The first even sub-data object is stored to a first single port memory device and the second odd sub-data object to a second single port memory device when the first write operation and the second write operation occur at the same time. The second even sub-data object is stored to the first single port memory device and the first odd sub-data object to the second single port memory device when the first write operation and the second write operation occur at the same time.

    SYSTEMS AND METHODS FOR ACCESSING CACHE MEMORY
    45.
    发明申请
    SYSTEMS AND METHODS FOR ACCESSING CACHE MEMORY 有权
    用于访问高速缓存存储器的系统和方法

    公开(公告)号:US20140281238A1

    公开(公告)日:2014-09-18

    申请号:US13843278

    申请日:2013-03-15

    CPC classification number: G06F12/0811 G06F12/0862 G06F12/0897 G06F2212/1024

    Abstract: Systems and methods for providing data from a cache memory to requestors includes a number of cache memory levels arranged in a hierarchy. The method includes receiving a request for fetching data from the cache memory and determining one or more addresses in a cache memory level which is one level higher than a current cache memory level using one or more prediction algorithms. Further, the method includes pre-fetching the one or more addresses from the high cache memory level and determining if the data is available in the addresses. If data is available in the one or more addresses then data is fetched from the high cache level, else addresses of a next level which is higher than the high cache memory level are determined and pre-fetched. Furthermore, the method includes providing the fetched data to the requestor.

    Abstract translation: 用于从缓存存储器向请求者提供数据的系统和方法包括以层级布置的多个高速缓存存储器级。 该方法包括从高速缓冲存储器接收数据取出请求,并使用一个或多个预测算法确定高于当前高速缓存存储器级别的一级的高速缓冲存储器级别中的一个或多个地址。 此外,该方法包括从高速缓冲存储器级别预取一个或多个地址,并确定该地址中的数据是否可用。 如果数据在一个或多个地址中可用,则从高高速缓存级别获取数据,否则确定并预取高于高缓存存储器级别的下一级的地址。 此外,该方法包括将提取的数据提供给请求者。

    DYNAMIC EVALUATION AND ADAPTION OF HARDWARE HASH FUNCTIONS
    46.
    发明申请
    DYNAMIC EVALUATION AND ADAPTION OF HARDWARE HASH FUNCTIONS 有权
    动态评估和硬件哈希函数的自适应

    公开(公告)号:US20140149723A1

    公开(公告)日:2014-05-29

    申请号:US14060900

    申请日:2013-10-23

    Abstract: Creating hash values based on bit values of an input vector. An apparatus includes a first and a second hash table, a first and second hash function generator adapted to configure a respective hash function for a creation of a first and second hash value based on the bit values of the input vector. The hash values are stored in the respective hash tables. An evaluation unit includes a comparison unit to compare a respective effectiveness of the first hash function and the second hash function, and an exchanging unit responsive to the comparison unit adapted to replace the first hash function by the second hash function.

    Abstract translation: 基于输入向量的位值创建哈希值。 一种装置包括第一和第二散列表,第一和第二散列函数发生器,其适于基于输入向量的位值来配置用于创建第一和第二散列值的相应散列函数。 哈希值存储在相应的散列表中。 评估单元包括比较单元,用于比较第一散列函数和第二散列函数的相应有效性,以及响应于比较单元的交换单元,适于通过第二散列函数来替换第一散列函数。

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