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    MULTI-TABLE APPROACH TO FLOATING-POINT FUNCTION APPROXIMATION
    1.
    发明申请
    MULTI-TABLE APPROACH TO FLOATING-POINT FUNCTION APPROXIMATION 有权

    公开(公告)号：US20250068695A1

    公开(公告)日：2025-02-27

    申请号：US18455247

    申请日：2023-08-24

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： ROBERT FREDERICK ENENKEL ,  CHRISTOPHER ANAND ,  SILVIA MELITTA MUELLER ,  LUCAS DUTTON ,  YU-SHIUAN WU

    IPC: G06F17/17 ,  G06F1/03 ,  G06F7/483

    Abstract: Function approximation includes receiving a number value to be input to a function. The number value includes a first and second plurality of bits. A first approximation value of a function is determined using the first plurality of bits as an index to a first lookup table including a plurality of candidate first approximation values. A first correction coefficient is determined using the first plurality of bits as an index to a second lookup table including a plurality of candidate first correction coefficients. A second correction coefficient is determined by using the first plurality of bits as an index to a third lookup table including a plurality of candidate second correction coefficients. A second approximation value of the function is determined based on the first approximation value, the first correction coefficient, and the second plurality of bits.

    Arithmetic devices with look-up table for neural network
    2.
    发明授权
    Arithmetic devices with look-up table for neural network 有权

    公开(公告)号：US12131249B2

    公开(公告)日：2024-10-29

    申请号：US17076428

    申请日：2020-10-21

    Applicant: SK hynix Inc.

    Inventor： Choung Ki Song

    IPC: G06N3/048 ,  G06F1/03 ,  G06F7/544

    CPC classification number: G06N3/048 ,  G06F1/03 ,  G06F7/5443 ,  G06F2207/4824

    Abstract: An arithmetic device includes a multiplying-accumulating (MAC) operator and an activation function (AF) circuit. The MAC operator performs a MAC arithmetic operation for weight data and vector data to generate an arithmetic result signal. The AF circuit extracts a first bit group and a second bit group from the arithmetic result signal. In addition, the AF circuit generates an input distribution signal based on the first bit group and the second bit group. Moreover, the AF circuit selects and outputs an output distribution signal that corresponds to the input distribution signal based on an activation function.

    METHODS AND SYSTEMS FOR ENCODING DATA USING ARTIFICIAL FINGERPRINTS
    4.
    发明公开
    METHODS AND SYSTEMS FOR ENCODING DATA USING ARTIFICIAL FINGERPRINTS 审中-公开

    公开(公告)号：US20240242387A1

    公开(公告)日：2024-07-18

    申请号：US18154578

    申请日：2023-01-13

    Applicant: Xerox Corporation

    Inventor： Guo-Yau Lin ,  Eliud Robles Flores ,  David R. Stookey ,  Varun Sambhy

    IPC: G06T9/00 ,  G06F1/03

    CPC classification number: G06T9/00 ,  G06F1/03

    Abstract: Systems and methods for encoding data in a machine-readable image (e.g., an artificial fingerprint) are disclosed. The methods include segmenting a plurality of bits included in a bit stream to be encoded into a plurality of blocks such that each block includes two or more of the plurality of bits. The plurality of blocks are used to generate a minutiae template comprising a plurality of minutiae points each of which is representative of a local ridge discontinuity in a fingerprint, and is associated with a location and an orientation. An artificial fingerprint is generated from the minutiae template, and stored in association with the bit stream. The artificial fingerprint encodes the bit stream and comprises a plurality of ridges and a plurality of valleys.

    PHASE CONSISTENT NUMERICALLY CONTROLLED OSCILLATOR
    5.
    发明公开
    PHASE CONSISTENT NUMERICALLY CONTROLLED OSCILLATOR 审中-公开

    公开(公告)号：US20240187007A1

    公开(公告)日：2024-06-06

    申请号：US18060856

    申请日：2022-12-01

    Applicant: Analog Devices International Unlimited Company

    Inventor： Krishnan Unni Unnikrishnapillai

    IPC: H03L7/099 ,  G06F1/03

    CPC classification number: H03L7/0994 ,  G06F1/0328 ,  H03L7/0992 ,  H03M1/12

    Abstract: A numerically controlled oscillator system for maintaining a consistent phase reference while switching data rates may include a numerically controlled oscillator (NCO) circuit. The NCO circuit may include a phase accumulator, a phase-to-signal mapping circuit, and a first free-running counter. The phase accumulator may receive a new phase value as an input in response to an update signal. The phase-to-signal mapping circuit may map a value from the phase accumulator to a periodic signal. The first free-running counter may continue counting, without being reset, while the numerically controlled oscillator system is switching digital data rates. The first free-running counter may be configured to provide the new phase value to the phase accumulator using a representation of a counter value of the first free-running counter and a frequency tuning word defined by a representation of a frequency of the periodic signal.

    Methods and apparatus for performing video processing matrix operations within a memory array
    6.
    发明授权
    Methods and apparatus for performing video processing matrix operations within a memory array 有权

    公开(公告)号：US11928177B2

    公开(公告)日：2024-03-12

    申请号：US17948126

    申请日：2022-09-19

    Applicant: Micron Technology, Inc.

    Inventor： Fa-Long Luo

    IPC: G06F17/16 ,  G06F1/03 ,  G06F12/02 ,  G06F17/14 ,  G11C11/4094

    CPC classification number: G06F17/16 ,  G06F1/03 ,  G06F12/0207 ,  G06F17/147 ,  G11C11/4094

    Abstract: Methods and apparatus for performing video processing matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for discrete cosine transform (DCT) matrix transformations and performing DCT matrix operations therein. Exemplary embodiments described herein perform DCT matrix-matrix multiplication operations within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one embodiment, matrix-matrix multiplication operations are obtained using separate matrix-vector products. In one exemplary embodiment, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage. The resulting signals can be converted from analog voltages to a digital values by an MMU to yield a vector-matrix product. In some cases, the MMU may additionally perform various other logical operations within the digital domain.

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