公开(公告)号：US20040200886A1

公开(公告)日：2004-10-14

申请号：US10410719

申请日：2003-04-09

Applicant: International Rectifier Corp.

Inventor： Chuan Cheah

IPC: H01L029/12 ,  B23K031/02

CPC classification number: H01L24/29 ,  B23K35/262 ,  H01L24/33 ,  H01L24/83 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/157 ,  Y10S428/929 ,  Y10T428/12528 ,  Y10T428/12535 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722 ,  Y10T428/12806 ,  Y10T428/12812 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A semiconductor device is disclosed containing a semiconductor die having a trimetal electrode soldered to a substrate by a SnnullSb solder.

Abstract translation: 公开了一种半导体器件，其包含具有通过Sn-Sb焊料焊接到衬底的三电极电极的半导体管芯。

公开(公告)号：US20040052011A1

公开(公告)日：2004-03-18

申请号：US10440586

申请日：2003-05-19

Applicant: International Rectifier Corp.

Inventor： Ray King ,  Lyle Bryan

IPC: H02H003/00

CPC classification number: H01H9/542 ,  H01H2009/546

Abstract: A circuit to suppress arc across contacts of a relay is provided, in which the relay is electrically coupled to a power supply and a load. The circuit includes an arc suppression circuit electrically coupled between the first and second contacts of the relay, and the arc suppression circuit includes a capacitor and a switch, both of which are electrically coupled to the first and second contacts of the relay, in which the switch is configured to turn on when the first and second contacts of the relay change state, thereby providing an alternate path for a current flow through the load.

Abstract translation: 提供了一种在继电器的触点之间抑制电弧的电路，其中继电器电耦合到电源和负载。 电路包括电耦合在继电器的第一和第二触点之间的电弧抑制电路，并且电弧抑制电路包括电容器和开关，两者都电耦合到继电器的第一和第二触点，其中 开关被配置为当继电器的第一和第二触点改变状态时导通，从而为通过负载的电流提供备用路径。

公开(公告)号：US20030165072A1

公开(公告)日：2003-09-04

申请号：US10090281

申请日：2002-03-04

Applicant: International Rectifier Corp.

Inventor： Bruno C. Nadd ,  David C. Tam ,  Mark Pavier ,  Glyn Connah

IPC: H02M001/00

CPC classification number: H02P29/02 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M1/32 ,  H02M1/36 ,  H02M1/38 ,  H02M7/003 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs. The entire bridge is controlled by the IC. Shoot thru protection is provided for each leg, and a PMW soft start sequence is provided through the control of the low side MOSFETs, programed by an external, chargeable RC circuit. Input signals to the high side MOSFETs select the operation modes. Protective circuits are provided for short circuit current and over current conditions. Sleep mode and braking/non braking control is also provided.

Abstract translation: 用于d-c电机的完全受保护的H桥由两个高边MOSFET组成，第一导电散热器上的控制和逻辑IC都在第一封装和两个分立的低侧MOSFET内。 整个桥梁由IC控制。 为每条支路提供射击保护，通过控制低端MOSFET提供PMW软起动序列，由外部可充电RC电路编程。 输入高边MOSFET的信号选择工作模式。 为短路电流和过流条件提供保护电路。 还提供睡眠模式和制动/非制动控制。

公开(公告)号：US20030052321A1

公开(公告)日：2003-03-20

申请号：US09955655

申请日：2001-09-18

Applicant: International Rectifier Corp.

Inventor： Srikant Sridevan

IPC: H01L031/0312

CPC classification number: H01L29/7802 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66068

Abstract: A polysilicon FET is built atop a SiC diode to form a MOSgated device. The polysilicon FET includes an invertible layer of polysilicon atop the surface of a SiC diode which has spaced diode diffusions. A MOSgate is formed on the polysilicon layer and the energization of the gate causes an inversion channel in the invertible layer to form a majority carrier conduction path from a top source electrode to a bottom drain electrode. Forward voltage is blocked in part by the polysilicon FET and in larger part by the depletion of the silicon carbide area between the spaced diode diffusions.

Abstract translation: 在SiC二极管的顶部形成多晶硅FET，以形成MOS器件。 多晶硅FET在具有间隔二极管扩散的SiC二极管的表面顶部包括多晶硅的可逆层。 在多晶硅层上形成MOS栅极，并且栅极的激励导致可逆层中的反向沟道，以形成从顶部源极到底部漏极的多数载流子传导路径。 正向电压部分地被多晶硅FET阻挡，并且在很大程度上被间隔开的二极管扩散之间的碳化硅区域的耗尽。

公开(公告)号：US20030006483A1

公开(公告)日：2003-01-09

申请号：US10112821

申请日：2002-03-28

Applicant: International Rectifier Corp.

Inventor： Kyle Spring ,  Jianjun Cao

IPC: H01L029/80

CPC classification number: H01L29/7802 ,  H01L29/1095 ,  H01L29/66712

Abstract: A MOSFET that includes short channel regions for a reduced RDSON, and narrowly spaced, relatively deep base regions for an improved breakdown voltage.

Abstract translation: 一个MOSFET，其包括用于减小的RDSON的短沟道区域和窄间隔的相对较深的基极区域，用于改善的击穿电压。

公开(公告)号：US20020195627A1

公开(公告)日：2002-12-26

申请号：US09891727

申请日：2001-06-26

Applicant: International Rectifier Corp.

Inventor： Daniel M. Kinzer ,  Srikant Sridevan

IPC: H01L031/062

CPC classification number: H01L29/7816 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/7824 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A lateral conduction superjunction semiconductor device has a plurality of spaced vertical trenches in a junction receiving layer of Pnull silicon. An Nnull diffusion lines the walls of the trench and the concentration and thickness of the Nnull diffusion and Pnull mesas are arranged to deplete fully in reverse blocking operation. A MOSgate structure is connected at one end of the trenches and a drain is connected at its other end. An Nnullnull further layer or an insulation oxide layer may be interposed between a Pnullnull substrate and the Pnull junction receiving layer.

Abstract translation: 横向导电超结半导体器件在P-硅的结接收层中具有多个间隔开的垂直沟槽。 N-扩散线排列在沟槽的壁上，并且N-扩散和P-台面的浓度和厚度被排列成完全消耗在反向阻塞操作中。 MOSgate结构在沟槽的一端连接，漏极在其另一端连接。 可以在P-基底和P-结接收层之间插入N-另外的层或绝缘氧化物层。

公开(公告)号：US20020190338A1

公开(公告)日：2002-12-19

申请号：US10170859

申请日：2002-06-12

Applicant: International Rectifier Corp.

Inventor： Slawomir Skocki

IPC: H01L029/47

CPC classification number: H01L29/0619 ,  H01L29/872

Abstract: A composite field ring for a Schottky diode has a low concentration deep portion to increase breakdown voltage withstand and a high concentration, shallow region to enable minority carrier injection during high forward current conduction. The composite ring permits a reduction in the thickness of the epitaxially formed layer which receives the Schottky barrier metal.

Abstract translation: 用于肖特基二极管的复合场环具有低浓度深部分以增加耐压耐压和高浓度的浅区域，以在高正向电流传导期间实现少数载流子注入。 复合环允许减小接收肖特基势垒金属的外延形成层的厚度。

公开(公告)号：US20020149079A1

公开(公告)日：2002-10-17

申请号：US10120287

申请日：2002-04-10

Applicant: International Rectifier Corp.

Inventor： Kyle Spring

IPC: H01L023/58

CPC classification number: H01L29/7811 ,  H01L23/485 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The oxide atop a P pad below the gate electrode has a cut completely through the oxide atop the P pad to prevent the drift of contamination ions, such as sodium ions from the periphery of a MOSgated device to the periphery of the active area, thus stabilizing the device threshold voltage under high temperature reverse bias. The cut may be filled with metal.

Abstract translation: 在栅极电极下面的P焊盘顶部的氧化物完全穿过P焊盘顶部的氧化物切割，以防止污染离子如钠离子从MOS器件周围迁移到有源区域周围，从而稳定 器件阈值电压在高温反向偏置下。 切割可以用金属填充。

公开(公告)号：US20020146861A1

公开(公告)日：2002-10-10

申请号：US10106927

申请日：2002-03-26

Applicant: International rectifier corp.

Inventor： Martin Standing

IPC: H01L021/44 ,  H01L021/48

CPC classification number: H01L24/27 ,  H01L21/563 ,  H01L24/29 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/29078 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/13091 ,  H05K3/305 ,  H05K3/3436 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A process for forming an insulation underfill for soldering semiconductor die solder balls by a solder paste on conductive traces on a support surface. The process comprises the screen printing or deposition from a syringe of thermoplastic or thermosetting epoxy columns between the solder balls, to a height equal to the standoff height of the die from the support surface. The assembly is first heated to a temperature at which the plastic becomes semifluid and before the area over which it will spread becomes contaminated with flux residue; and is next heated to the solder paste reflow temperature.

Abstract translation: 用于通过焊膏在支撑表面上的导电迹线上形成用于焊接半导体焊料球的绝缘底部填充物的方法。 该方法包括从焊球之间的热塑性或热固性环氧树脂柱的注射器的丝网印刷或沉积到与模具从支撑表面的间隔高度相等的高度。 首先将组件加热到塑料变成半流体的温度，并且在其将被扩散的区域被熔剂残渣污染之前; 并接着加热到焊膏回流温度。

公开(公告)号：US20020117687A1

公开(公告)日：2002-08-29

申请号：US10083060

申请日：2002-02-26

Applicant: International Rectifier Corp.

Inventor： Kyle Spring ,  Jianjun Cao ,  Thomas Herman

IPC: H01L031/0328

CPC classification number: H01L29/7802 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/7811

Abstract: A vertical MOSFET has a substrate of a first conductivity type. A channel region of a second conductivity type is diffused into the substrate. A gate is disposed at least partially over the channel region. A source region of a second conductivity type is disposed proximate to the gate and adjacent to the channel region. The channel region includes a depletion implant area proximate to the gate. The depletion implant species is of the second conductivity type to reduce the concentration of the first conductivity type in the channel region without increasing the conductivity in the drain/drift region.

Abstract translation: 垂直MOSFET具有第一导电类型的衬底。 第二导电类型的沟道区域扩散到衬底中。 至少部分地在通道区域上设置栅极。 第二导电类型的源极区域设置在栅极附近并且邻近沟道区域。 沟道区域包括靠近栅极的耗尽植入区域。 耗尽注入种类具有第二导电类型，以减小沟道区中第一导电类型的浓度，而不增加漏极/漂移区中的导电性。