公开(公告)号：US20040065934A1

公开(公告)日：2004-04-08

申请号：US10649929

申请日：2003-08-26

Applicant: International Rectifier Corp.

Inventor： Srikant Sridevan ,  Daniel M. Kinzer

IPC: H01L023/58

CPC classification number: H01L29/0634 ,  H01L29/0847 ,  H01L29/0852 ,  H01L29/1095 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/78 ,  H01L29/7816 ,  H01L29/7825 ,  H01L29/7835 ,  H01L29/78624 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A lateral conduction superjunction device has bidirectional conduction characteristics. In a first embodiment, spaced vertical trenches in a P substrate are lined with N diffusions. A central MOSgate structure is disposed centrally in the parallel trenches and source and drain electrodes are at the opposite respective ends of the trenches. In a second embodiment, flat layers of alternately opposite conductivity types have source and drain regions at their opposite ends. A trench MOSgate is disposed between the source region at one end of the layers to enable bidirectional currant flow through the stocked layers.

公开(公告)号：US20030052321A1

公开(公告)日：2003-03-20

申请号：US09955655

申请日：2001-09-18

Applicant: International Rectifier Corp.

Inventor： Srikant Sridevan

IPC: H01L031/0312

CPC classification number: H01L29/7802 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66068

Abstract: A polysilicon FET is built atop a SiC diode to form a MOSgated device. The polysilicon FET includes an invertible layer of polysilicon atop the surface of a SiC diode which has spaced diode diffusions. A MOSgate is formed on the polysilicon layer and the energization of the gate causes an inversion channel in the invertible layer to form a majority carrier conduction path from a top source electrode to a bottom drain electrode. Forward voltage is blocked in part by the polysilicon FET and in larger part by the depletion of the silicon carbide area between the spaced diode diffusions.

Abstract translation: 在SiC二极管的顶部形成多晶硅FET，以形成MOS器件。 多晶硅FET在具有间隔二极管扩散的SiC二极管的表面顶部包括多晶硅的可逆层。 在多晶硅层上形成MOS栅极，并且栅极的激励导致可逆层中的反向沟道，以形成从顶部源极到底部漏极的多数载流子传导路径。 正向电压部分地被多晶硅FET阻挡，并且在很大程度上被间隔开的二极管扩散之间的碳化硅区域的耗尽。

公开(公告)号：US20020195627A1

公开(公告)日：2002-12-26

申请号：US09891727

申请日：2001-06-26

Applicant: International Rectifier Corp.

Inventor： Daniel M. Kinzer ,  Srikant Sridevan

IPC: H01L031/062

CPC classification number: H01L29/7816 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/7824 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A lateral conduction superjunction semiconductor device has a plurality of spaced vertical trenches in a junction receiving layer of Pnull silicon. An Nnull diffusion lines the walls of the trench and the concentration and thickness of the Nnull diffusion and Pnull mesas are arranged to deplete fully in reverse blocking operation. A MOSgate structure is connected at one end of the trenches and a drain is connected at its other end. An Nnullnull further layer or an insulation oxide layer may be interposed between a Pnullnull substrate and the Pnull junction receiving layer.

Abstract translation: 横向导电超结半导体器件在P-硅的结接收层中具有多个间隔开的垂直沟槽。 N-扩散线排列在沟槽的壁上，并且N-扩散和P-台面的浓度和厚度被排列成完全消耗在反向阻塞操作中。 MOSgate结构在沟槽的一端连接，漏极在其另一端连接。 可以在P-基底和P-结接收层之间插入N-另外的层或绝缘氧化物层。

公开(公告)号：US20010041400A1

公开(公告)日：2001-11-15

申请号：US09852579

申请日：2001-05-10

Applicant: International Rectifier Corp.

Inventor： Lipping Ren ,  Srikant Sridevan

IPC: H01L021/8238

CPC classification number: H01L29/7802 ,  H01L21/26586 ,  H01L21/76237 ,  H01L29/0634

Abstract: A process is described for making a superjunction semiconductor device. a large number of symmetrically spaced trenches penetrate the Nnull epitaxial layer of silicon atop an Nnull body to a depth of 35 to 40 microns. The wells have a circular cross-section and a diameter of about 9 microns. The trench walls are implanted by an ion implant beam of boron which is at a slight angle to the axis of the trenches. The wafer is intermittently or continuously rotated about an axis less than 90null to its surface to cause skewing of the implant beam and more uniform distribution of boron ions over the interior surfaces of the trenches.

Abstract translation: 描述了制造超结半导体器件的工艺。 大量对称间隔开的沟槽将N +体顶上的硅的N-外延层穿透至35至40微米的深度。 孔具有圆形横截面和约9微米的直径。 通过与沟槽轴线成微小角度的离子注入硼硼注入沟壁。 晶片围绕其表面小于90°的轴线间断地或连续地旋转，以引起注入光束的偏斜和硼离子在沟槽的内表面上的更均匀的分布。