公开(公告)号：US20040200886A1

公开(公告)日：2004-10-14

申请号：US10410719

申请日：2003-04-09

Applicant: International Rectifier Corp.

Inventor： Chuan Cheah

IPC: H01L029/12 ,  B23K031/02

CPC classification number: H01L24/29 ,  B23K35/262 ,  H01L24/33 ,  H01L24/83 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/157 ,  Y10S428/929 ,  Y10T428/12528 ,  Y10T428/12535 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722 ,  Y10T428/12806 ,  Y10T428/12812 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A semiconductor device is disclosed containing a semiconductor die having a trimetal electrode soldered to a substrate by a SnnullSb solder.

Abstract translation: 公开了一种半导体器件，其包含具有通过Sn-Sb焊料焊接到衬底的三电极电极的半导体管芯。

公开(公告)号：US20010050441A1

公开(公告)日：2001-12-13

申请号：US09812027

申请日：2001-03-19

Applicant: International Rectifier Corp.

Inventor： Bharat Shivkumar ,  Chuan Cheah

IPC: H01L023/48 ,  H01L023/52

CPC classification number: H01L23/564 ,  H01L21/563 ,  H01L23/24 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3737 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A multichip module has a substrate, which receives several flip chip and for other semiconductor die on one surface and has vias extending through the substrate from the flip chip bottom electrodes to solder ball electrodes on the bottom of the substrate. Passive components are also mounted on the top of the substrate and are connected to further vias which extend to respective ball contacts at the substrate bottom. In one embodiment, the bottom surfaces and electrodes of the die are insulated and their tops (and drain electrodes) are connected by a moldable conductive layer. In another embodiment the top surface of the substrate is covered by an insulation cap, which may be finned for improved thermal properties. The passives are upended to have their longest dimension perpendicular to the substrate surface and are between the fin valleys. The insulation cover is a cap which fits over the top of the substrate, with mold lock depressions contained in the junction between the cap peripheral interior edge and the substrate mating edge surfaces.

Abstract translation: 多芯片模块具有基板，其在一个表面上接收多个倒装芯片和其它半导体管芯，并且具有从倒装芯片底部电极延伸穿过基板的通孔到基板底部的焊球电极。 被动元件也安装在基板的顶部，并且连接到在基板底部延伸到相应的滚珠触点的另外的通孔。 在一个实施例中，管芯的底表面和电极是绝缘的，并且它们的顶部（和漏电极）通过可模制导电层连接。 在另一个实施例中，衬底的顶表面由绝缘帽覆盖，绝缘帽可以被翅片以改善热性能。 无源器件具有垂直于衬底表面的最长尺寸，并且位于翅片谷之间。 绝缘盖是适合于基板顶部的盖，其中模具锁定凹陷包含在盖周边内部边缘和基板配合边缘表面之间的连接处。

公开(公告)号：US20010048154A1

公开(公告)日：2001-12-06

申请号：US09812464

申请日：2001-03-20

Applicant: International Rectifier Corp.

Inventor： Chuan Cheah ,  Naresh Thapar ,  Srini Thiruvenkatachari

IPC: H01L023/495 ,  H01L023/34

CPC classification number: H01L23/49575 ,  H01L23/49562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0603 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/85207 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An SO-8 type package contains a control MOSFET die mounted on one lead frame section and a synchronous MOSFET and Schottky diode die is mounted on a second lead frame pad section. The die are interconnected through the lead frame pads and wire bonds to define a buck converter circuit and the die and lead frame pads are overmolded with a common insulation housing.

Abstract translation: SO-8型封装包含安装在一个引线框架部分上的控制MOSFET管芯，并且同步MOSFET和肖特基二极管管芯安装在第二引线框架焊盘部分上。 管芯通过引线框架焊盘和引线接合互连，以定义降压转换器电路，并且模具和引线框架焊盘用共同的绝缘外壳包覆成型。