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公开(公告)号：US09749388B2
公开(公告)日：2017-08-29
申请号：US14308261
申请日：2014-06-18
Applicant: THE GOVERNORS OF THE UNIVERSITY OF ALBERTA
Inventor： Kaveh Mahdaviani , Raman Yazdani , Masoud Ardakani
CPC classification number: H04L67/02 , H03M13/033 , H03M13/1108 , H03M13/2906 , H03M13/373 , H03M13/3761 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/0076
Abstract: Systems, methods, and devices for encoding and decoding data packets for transmission across a data network. To encode, data packets are first subjected to a an outer code process to result in outer coded packets. The outer coded packets are then divided into generations or groups of outer coded packets, each group or generation having an equal number of packets. Output packets are then created by forming random linear combinations of the outer coded packets from a specific generation or group of outer coded packets. The coefficients for the various elements of each linear combination is selected from a Galois field of values. To decode the incoming packets, enough packets are received until an iterative decoding process can be initiated.
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公开(公告)号：US09742354B2
公开(公告)日：2017-08-22
申请号：US15341352
申请日：2016-11-02
Applicant: Microsemi Solutions (U.S.), Inc.
Inventor： Hormoz Djahanshahi , Kenneth Allan Townsend
CPC classification number: H03B5/1293 , H03B5/04 , H03B5/06 , H03B5/1212 , H03B5/1228 , H03B5/1234 , H03B5/124 , H03B5/1278 , H03B5/129 , H03B2200/0094 , H03K3/0315 , H03L1/00 , H03L3/00 , H03L5/00 , H03L7/099
Abstract: The present disclosure provides methods and apparatus for dynamically adjusting the common mode voltage at the LC tank node and/or the power supply voltage of a VCO with an LC resonator in order to force oscillation start-up by temporarily increasing gain. Methods according to certain preferred embodiments may reduce power consumption and/or overcome threshold voltage limitations and/or increase frequency and frequency tuning range during normal (steady-state) operation.
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公开(公告)号：US20170194969A1
公开(公告)日：2017-07-06
申请号：US14986866
申请日：2016-01-04
Applicant: Infineon Technologies AG
Inventor： Pedro AMARAL , Florin BULHAC
CPC classification number: H03L7/07 , H03K3/84 , H03L1/00 , H03L7/093 , H03L7/0991 , H03L7/18 , H03L7/181 , H03L2207/50
Abstract: Representative implementations of devices and techniques provide calibration for a spread spectrum PLL device modulator. A first calibration loop includes a cross correlator to correlate a sequence of random or pseudo-random signals injected into a signal path of the PLL device to a phase error signal of the PLL device. A second calibration loop includes a bandwidth tuner to tune a bandwidth of the PLL device and to reduce a jitter of the PLL device.
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34.发明授权公开(公告)号：US09634676B2
公开(公告)日：2017-04-25
申请号：US14789095
申请日：2015-07-01
Applicant: QUALCOMM Incorporated
Inventor： Ashok Swaminathan , Christian Venerus , Marzio Pedrali-Noy
CPC classification number: H03L7/099 , H03B5/04 , H03B2202/042 , H03B2202/06 , H03L1/00
Abstract: Methods, systems, and circuits for providing compensation for voltage variation are disclosed. A system includes: a voltage comparator configured to assert a control signal in response to detecting that one or more of power supply voltages droops below a threshold amount; a phase locked loop (PLL) configured to divide an output frequency for the PLL in response to the assertion of the control signal; a plurality of voltage sensors corresponding to the plurality of power supply voltages, the voltage sensors configured to output respective digital signals indicative of a voltage level of its corresponding power supply voltage; and a control circuit configured to control an oscillator frequency in the PLL during the open-loop mode responsive to the respective digital signals.
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35.发明授权Methods and devices for error correction of a signal using delta sigma modulation 有权用于使用Δ-Σ调制的信号纠错的方法和装置公开(公告)号：US09520886B2
公开(公告)日：2016-12-13
申请号：US14907596
申请日：2013-11-28
Applicant: Smart Energy Instruments Inc.
CPC classification number: H03L7/0994 , G06F1/02 , G06F17/10 , H03L1/00 , H03L7/081 , H03L7/095 , H03M3/30
Abstract: A method for correcting long-term phase drift of a crystal oscillator in a numerically-controlled oscillator is described. The method includes determining the phase error in an oscillator signal in comparison with an external time base; delta-sigma modulating the phase error to generate a delta-sigma error bitstream; conditionally adding or subtracting an error correction step size from a phase increment value in each clock cycle based on the delta-sigma error bitstream, to create a modulated phase increment value; and adding the modulated phase increment value to a phase accumulator to generate an error-corrected output digital signal. The delta-sigma-based error correction method avoids the use of multipliers. The same delta-sigma error signal can be used in multiple numerically-controlled oscillators configured to different output frequency if driven by the same reference oscillator.
Abstract translation: 描述了用于校正数控振荡器中的晶体振荡器的长期相位漂移的方法。 该方法包括：与外部时基相比确定振荡器信号中的相位误差; delta-sigma调制相位误差以产生Δ-Σ误差比特流; 基于Δ-Σ误差比特流，有条件地从每个时钟周期的相位增量值中增加或减去误差校正步长，以产生调制相位增量值; 并将调制相位增量值相加到相位累加器以产生经纠错的输出数字信号。 基于delta-sigma的纠错方法避免了乘法器的使用。 如果由相同的参考振荡器驱动，则可以在配置为不同输出频率的多个数控振荡器中使用相同的delta-sigma误差信号。
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Patent Agency Ranking
公开(公告)号：US09503098B1
公开(公告)日：2016-11-22
申请号：US15092591
申请日：2016-04-06
Inventor： Muhammad Taher Abuelma'Atti , Eyas Saleh Alsuhaibani
Abstract: The current-feedback operational amplifier-based sinusoidal oscillator circuit includes a pair of CFOAs connected to each other using five resistors and two capacitors. The condition and the frequency of oscillation are fully coupled, and thus none of them can be controlled without disturbing the other. The oscillator circuit provides a high impedance output current and two low impedance output voltages.
Abstract translation: 基于电流反馈运算放大器的正弦振荡器电路包括使用五个电阻器和两个电容器彼此连接的一对CFOAs。 振荡的条件和频率是完全耦合的，因此它们都不能被控制而不会干扰另一个。 振荡器电路提供高阻抗输出电流和两个低阻抗输出电压。
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37.发明授权Oscillation circuit, oscillator, electronic device, moving object, and control method of oscillator 有权振荡电路，振荡器，电子器件，移动物体和振荡器的控制方法公开(公告)号：US09467148B2
公开(公告)日：2016-10-11
申请号：US14842000
申请日：2015-09-01
Applicant: Seiko Epson Corporation
Inventor： Nobutaka Shiozaki , Yuichi Toriumi
Abstract: In order to reduce the possibility of erroneous switching of an operation mode, an oscillation circuit, an oscillator, an electronic device and a moving object including: a power source detecting section that detects a power supply state; a determining section that determines an input state of a predetermined signal; and a control section that switches a operation mode when the determining section determines that input of the predetermined signal is detected within a predetermined time after it is detected that power is supplied, and a control method of the oscillator are provided.
Abstract translation: 为了减少操作模式，振荡电路，振荡器，电子设备和移动物体的错误切换的可能性，包括：电源检测部分，其检测供电状态; 确定部分，确定预定信号的输入状态; 以及控制部，其在确定部确定在检测到所述电力被提供之后的预定时间内检测到所述预定信号的输入并且提供所述振荡器的控制方法时，切换操作模式。
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公开(公告)号：US20160164460A1
公开(公告)日：2016-06-09
申请号：US14560788
申请日：2014-12-04
Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
Inventor： Taekwang JANG , Dennis Michael Sylvester , David Theodore Blaauw
CPC classification number: H03B5/1265 , H03B5/1271 , H03L1/00 , H03L7/00 , H03L7/099 , H03L7/18 , H03L7/187 , H03L7/193
Abstract: Oscillator regulation circuitry is provided for regulating a frequency of an output signal generated by an oscillator. Oscillator regulation circuitry has frequency sensing circuitry for sensing the frequency of the output signal and generating a first signal depending on the frequency, and control circuitry which generates the oscillator control signal based on the comparison between the first signal and a non-oscillating reference signal. The frequency sensing circuitry includes at least one switched capacitor. This approach provides improved noise reduction, less sensitivity to process, temperature and voltage variations, and a more linear scaling of the frequency with the reference signal, compared to previous techniques.
Abstract translation: 提供振荡器调节电路用于调节由振荡器产生的输出信号的频率。 振荡器调节电路具有用于感测输出信号的频率并根据频率产生第一信号的频率感测电路，以及基于第一信号和非振荡参考信号之间的比较产生振荡器控制信号的控制电路。 频率感测电路包括至少一个开关电容器。 与以前的技术相比，该方法提供了改进的噪声降低，对过程的敏感性，温度和电压变化以及频率与参考信号的更线性缩放。
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39.发明授权CMOS oscillator having stable frequency with process, temperature, and voltage variation 有权具有稳定频率的CMOS振荡器，具有过程，温度和电压变化公开(公告)号：US09325323B2
公开(公告)日：2016-04-26
申请号：US14474091
申请日：2014-08-30
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Vikas Rana , Ganesh Raj R
CPC classification number: H03L1/00 , H03K3/011 , H03K3/0315 , H03K3/0322 , H03K3/354 , H03L1/022 , H03L7/0812 , H03L7/0891 , H03L7/0895 , H03L7/093 , H03L7/0995 , H03L7/0997 , H03L7/148 , H03L7/18
Abstract: A clock signal generation circuit configured to generate the clock signal having a frequency that is maintained across variations in a number of operating conditions, such as changes in supply voltage, temperature and processing time. In an embodiment, the frequency spread of the generated clock signal of a PVT-compensated CMOS ring oscillator is configured to compensate for variations in the supply voltage, as well as for variations in process and temperature via a process and temperature compensation circuit. The PVT-compensated CMOS ring oscillator includes a regulated voltage supply circuit to generate a supply voltage that is resistant to variations due to changes in the overall supply voltage.
Abstract translation: 时钟信号生成电路，被配置为生成具有在诸如电源电压，温度和处理时间的变化的操作条件的数量的变化中保持的频率的时钟信号。 在一个实施例中，PVT补偿的CMOS环形振荡器的所产生的时钟信号的频率扩展被配置为补偿电源电压的变化，以及通过处理和温度补偿电路对工艺和温度的变化。 PVT补偿的CMOS环形振荡器包括一个稳压电源，用于产生一个电源电压，该电源电压抵抗由于整个电源电压的变化引起的变化。
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40.发明授权公开(公告)号：US09314632B2
公开(公告)日：2016-04-19
申请号：US13861079
申请日：2013-04-11
Inventor： Goran Marnfeldt , Jess Shi
CPC classification number: A61N1/36153 , A61N1/025 , A61N1/08 , A61N1/3605 , A61N1/36146 , A61N1/37 , A61N1/378 , H03L1/00
Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.
Abstract translation: 用于在所公开的可植入刺激器装置中产生电流源和/或汇的顺应性电压（V +）的电路。 电路评估V +对于给定脉冲是否是最佳的，如果不是，则调整下一个脉冲的V +。 该电路使用放大器在脉冲期间的适当时间测量有源PDAC（电流源）和NDAC（电流吸收）之间的电压降。 评估测量的电压以确定它们相对于最佳值是高还是低。 如果低电平，则控制V +调节器以增加下一个脉冲的V +; 如果不是，则控制V +调节器以降低下一个脉冲的V +。 通过这种方法，可以考虑在种植体环境中可能发生的逐渐变化，V +在逐脉冲的基础上进行调整，以保持电压降至或接近最佳水平，以实现高效的DAC操作。
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