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公开(公告)号：US11736111B2
公开(公告)日：2023-08-22
申请号：US17455338
申请日：2021-11-17
申请人： Apple Inc.
发明人： Jared L. Zerbe , Brian S. Leibowitz , Sanjay Pant
CPC分类号： H03L7/099 , H03L1/00 , H03L7/0805
摘要： Techniques are disclosed relating to detecting supply voltage events and performing corrective actions. In some embodiments, an apparatus includes sensor circuitry and control circuitry. In some embodiments, the sensor circuitry is configured to monitor supply voltage from a power supply and detect a load release event that includes an increase in the supply voltage that meets one or more pre-determined threshold parameters. In some embodiments, the control circuitry is configured to increase clock cycle time for operations performed by circuitry powered by the supply voltage during a time interval, wherein the time interval corresponds to ringing of the supply voltage that reduces the supply voltage and results from the load release event. In some embodiments, the disclosed techniques may reduce transients in supply voltage (which may avoid equipment damage and computing errors) and may allow for reduced voltage margins (which may reduce overall power consumption).
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公开(公告)号：US11736063B2
公开(公告)日：2023-08-22
申请号：US17703106
申请日：2022-03-24
申请人： VIASAT, INC.
摘要： Systems and methods are provided for compensating for mechanical acceleration at a reference oscillator. A reference oscillator provides an oscillator output signal and an accelerometer on a same platform as the reference oscillator, such that mechanical acceleration at the reference oscillator is detected at the accelerometer to produce a measured acceleration. A filter assembly, having an associated set of filter weights, receives the measured acceleration from the accelerometer and provides a tuning control signal responsive to the measured acceleration to a frequency reference associated with the system. An adaptive weighting component receives the oscillator output signal of the reference oscillator and an external signal that is provided from a source external to the platform and adjusts the set of filter weights for the filter assembly based on a comparison of the external signal and the oscillator output signal.
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公开(公告)号：US11705895B1
公开(公告)日：2023-07-18
申请号：US17834897
申请日：2022-06-07
发明人： Yueh Chun Cheng
IPC分类号： H03K5/1252 , G05F1/56 , H03K3/03 , H03K3/011 , H03L1/00
CPC分类号： H03K5/1252 , G05F1/56 , H03K3/011 , H03K3/0315 , H03K3/0322 , H03L1/00
摘要： An apparatus comprises a first circuit, a second circuit, a first transistor, a second transistor, a third transistor, a first programmable resistance, and a second programmable resistance. The first circuit may be configured to generate a reference signal and a bias signal in response to a supply voltage and a first input signal. The first circuit generally provides supply noise rejection to variations in the supply voltage. The second circuit may be connected to the first circuit and a ring oscillator. The first transistor may be connected to the first circuit and configured to set a first reference current of the first circuit based on the first input signal and the first programmable resistance. The second transistor may be connected in parallel with the first transistor. The second transistor is generally diode-connected. The third transistor may be connected to the first circuit and configured to set a second reference current of the first circuit based on the first input signal and the second programmable resistance. The first circuit generally forms a current mirror with the second circuit. The second circuit may be configured to provide a programmable current ratio for the current mirror based on a value of a second input signal.
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公开(公告)号：US11476804B1
公开(公告)日：2022-10-18
申请号：US17532689
申请日：2021-11-22
发明人： Gerard T. Quilligan , Terry Hurford
摘要： A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.
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公开(公告)号：US11456751B1
公开(公告)日：2022-09-27
申请号：US17536924
申请日：2021-11-29
IPC分类号： H03L7/099 , H03B5/32 , H03L7/08 , H03L7/14 , H03L7/10 , H03L7/06 , H03L1/00 , H03L1/02 , H03L7/00
摘要： A reference frequency signal generator comprises a plurality of ovenized reference crystal oscillators (OCXOs) having different turn-over-temperatures, a selector logic circuit coupled to outputs of the OCXOs, a temperature sensor, and a controller coupled to an output of the temperature sensor. The selector logic circuit outputs one of the outputs of the OCXOs based on a control signal from the controller. The controller also generates control signals for the OCXOs. In some implementations, the reference frequency signal generator includes a phase-locked loop or a fractional output divider coupled to the output of the selector logic circuit and configured to receive a calibration signal from the controller.
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公开(公告)号：US11323066B2
公开(公告)日：2022-05-03
申请号：US16952226
申请日：2020-11-19
申请人： VIASAT, INC.
摘要： Systems and methods are provided for compensating for mechanical acceleration at a reference oscillator. A reference oscillator provides an oscillator output signal and an accelerometer on a same platform as the reference oscillator, such that mechanical acceleration at the reference oscillator is detected at the accelerometer to produce a measured acceleration. A filter assembly, having an associated set of filter weights, receives the measured acceleration from the accelerometer and provides a tuning control signal responsive to the measured acceleration to a frequency reference associated with the system. An adaptive weighting component receives the oscillator output signal of the reference oscillator and an external signal that is provided from a source external to the platform and adjusts the set of filter weights for the filter assembly based on a comparison of the external signal and the oscillator output signal.
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公开(公告)号：US20210359691A1
公开(公告)日：2021-11-18
申请号：US17386774
申请日：2021-07-28
摘要： A tracking system for a digital Phase Locked Loop (PLL), the tracking system including a PLL model configured to emulate an actual internal PLL signal, wherein the emulation is based on another internal PLL signal received from the digital PLL and on an estimated analog PLL parameter of the PLL model; and a tracker configured to compare the emulated internal PLL signal with the actual internal PLL signal, and to update the estimated analog PLL parameter according to a minimization algorithm that minimizes a result of the comparison.
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公开(公告)号：US10996086B2
公开(公告)日：2021-05-04
申请号：US16724815
申请日：2019-12-23
申请人： INVENSENSE, INC.
发明人： Andy Milota , James Lim , William Kerry Keal
摘要： Various aspects of this disclosure comprise systems and methods for synchronizing sensor data acquisition and/or output. For example, various aspects of this disclosure provide for achieving a desired level of timing accuracy in a MEMS sensor system, even in an implementation in which timer drift is substantial.
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公开(公告)号：US10979055B2
公开(公告)日：2021-04-13
申请号：US16780790
申请日：2020-02-03
申请人： Intel Corporation
摘要： An apparatus is provided which comprises: a first ring oscillator comprising at least one aging tolerant circuitry; a second ring oscillator comprising a non-aging tolerant circuitry; a first counter coupled to the first ring oscillator, wherein the first counter is to count a frequency of the first ring oscillator; a second counter coupled to the second ring oscillator, wherein the second counter is to count a frequency of the second ring oscillator; and logic to compare the frequencies of the first and second ring oscillators, and to generate one or more controls to mitigate aging of one or more devices.
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公开(公告)号：US20210026389A1
公开(公告)日：2021-01-28
申请号：US16520112
申请日：2019-07-23
申请人： Arm Limited
摘要： Various implementations described herein are directed to multi-stage system. The system may include a first stage having a current bias generator that generates a biasing current. The system may include a second stage that is coupled to the first stage, and the second stage may include a load that utilizes the biasing current generated by the current bias generator.
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