公开(公告)号：US11476804B1

公开(公告)日：2022-10-18

申请号：US17532689

申请日：2021-11-22

Applicant: United States of America as represented by the Administrator of NASA

Inventor： Gerard T. Quilligan ,  Terry Hurford

IPC: H03B5/36 ,  H03B5/12 ,  H03L1/00 ,  G05F3/02 ,  H04B1/04 ,  H03K3/011

Abstract: A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.