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公开(公告)号:US20210028266A1
公开(公告)日:2021-01-28
申请号:US16866519
申请日:2020-05-04
发明人: Sheng-Yu Wu , Mirng-Ji Lii , Shang-Yun Tu , Ching-Hui Chen
摘要: A display device includes a semiconductor substrate, an isolation layer, a light-emitting layer and a second electrode. The semiconductor substrate has a pixel region and a peripheral region located around the pixel region. The semiconductor substrate includes first electrodes and a driving element layer. The first electrodes are disposed in the pixel region and the first electrodes are electrically connected to the driving element layer. The isolation layer is disposed on the semiconductor substrate. The isolation layer includes a first isolation pattern disposed in the peripheral region, and the first isolation pattern has a first side surface and a second side surface opposite to the first side surface. The light-emitting layer is disposed on the isolation layer and the first electrodes, and covers the first side surface and the second side surface of the first isolation pattern. The second electrode is disposed on the light-emitting layer.
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公开(公告)号:US20200328153A1
公开(公告)日:2020-10-15
申请号:US16915312
申请日:2020-06-29
发明人: Mirng-Ji Lii , Chung-Shi Liu , Chin-Yu Ku , Hung-Jui Kuo , Alexander Kalnitsky , Ming-Che Ho , Yi-Wen Wu , Ching-Hui Chen , Kuo-Chio Liu
IPC分类号: H01L23/522 , H01L23/31 , H01L23/00 , H01L21/48 , H01L21/768 , H01L23/528
摘要: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.
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公开(公告)号:US10163842B2
公开(公告)日:2018-12-25
申请号:US15489954
申请日:2017-04-18
发明人: Chien-Hung Kuo , Chin-Yu Ku , Yuh-Sen Chang , Hon-Lin Huang , Sheng-Yu Wu , Ching-Hui Chen , Mirng-Ji Lii
摘要: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
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公开(公告)号:US20240321661A1
公开(公告)日:2024-09-26
申请号:US18679091
申请日:2024-05-30
发明人: Chen-Shien Chen , Kuo-Ching Hsu , Wei-Hung Lin , Hui-Min Huang , Ming-Da Cheng , Mirng-Ji Lii
IPC分类号: H01L23/31 , H01L21/56 , H01L23/00 , H01L23/538
CPC分类号: H01L23/3114 , H01L21/56 , H01L23/5384 , H01L24/81
摘要: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.
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公开(公告)号:US20240128231A1
公开(公告)日:2024-04-18
申请号:US18149935
申请日:2023-01-04
发明人: Fu Wei Liu , Pei-Wei Lee , Yun-Chung Wu , Bo-Yu Chiu , Szu-Hsien Lee , Mirng-Ji Lii
CPC分类号: H01L24/83 , H01L24/29 , H01L25/00 , H01L29/02 , H01L2224/29186 , H01L2224/83896
摘要: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.
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公开(公告)号:US20240125713A1
公开(公告)日:2024-04-18
申请号:US18152409
申请日:2023-01-10
发明人: Hao Chun Yang , Ming-Da Cheng , Pei-Wei Lee , Mirng-Ji Lii
CPC分类号: G01N21/9505 , G01N21/59 , G01N2201/06113 , G01N2201/0636
摘要: A method includes directing light at a first side of a semiconductor structure; detecting a first light intensity at a second side of the semiconductor structure, wherein the first light intensity corresponds to the light that penetrated the semiconductor structure from the first side to the second side; and comparing the first light intensity to a second light intensity, wherein the second light intensity corresponds to an expected intensity of light.
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公开(公告)号:US11842935B2
公开(公告)日:2023-12-12
申请号:US17318703
申请日:2021-05-12
发明人: Chen-Shien Chen , Kuo-Ching Hsu , Wei-Hung Lin , Hui-Min Huang , Ming-Da Cheng , Mirng-Ji Lii
IPC分类号: H01L23/31 , H01L23/538 , H01L21/56 , H01L23/00
CPC分类号: H01L23/3114 , H01L21/56 , H01L23/5384 , H01L24/81
摘要: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.
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公开(公告)号:US11824026B2
公开(公告)日:2023-11-21
申请号:US17113480
申请日:2020-12-07
发明人: Chen-Shien Chen , Sheng-Yu Wu , Mirng-Ji Lii , Chita Chuang
IPC分类号: H01L23/00
CPC分类号: H01L24/11 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/81 , H01L24/94 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/03614 , H01L2224/03912 , H01L2224/03916 , H01L2224/0401 , H01L2224/05082 , H01L2224/05166 , H01L2224/05187 , H01L2224/05553 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/1132 , H01L2224/1144 , H01L2224/1145 , H01L2224/1147 , H01L2224/11334 , H01L2224/11462 , H01L2224/11464 , H01L2224/11906 , H01L2224/131 , H01L2224/13007 , H01L2224/13013 , H01L2224/13021 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/14131 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2224/16245 , H01L2224/8183 , H01L2224/81191 , H01L2224/81805 , H01L2224/81815 , H01L2224/81825 , H01L2224/94 , H01L2224/05187 , H01L2924/04953 , H01L2224/05166 , H01L2924/00014 , H01L2224/0345 , H01L2924/00014 , H01L2224/03452 , H01L2924/00014 , H01L2224/131 , H01L2924/014 , H01L2224/13147 , H01L2924/00014 , H01L2224/13124 , H01L2924/00014 , H01L2224/13144 , H01L2924/00014 , H01L2224/13155 , H01L2924/00014 , H01L2224/13139 , H01L2924/00014 , H01L2224/13164 , H01L2924/00014 , H01L2224/13111 , H01L2924/00014 , H01L2224/13109 , H01L2924/00014 , H01L2224/1145 , H01L2924/00014 , H01L2224/11462 , H01L2924/00014 , H01L2224/1132 , H01L2924/00014 , H01L2224/11334 , H01L2924/00014 , H01L2224/1144 , H01L2924/00014 , H01L2224/11464 , H01L2924/00014 , H01L2224/03462 , H01L2924/00014 , H01L2224/1147 , H01L2924/00012 , H01L2224/94 , H01L2224/03 , H01L2224/94 , H01L2224/11 , H01L2224/05624 , H01L2924/00014 , H01L2224/05647 , H01L2924/00014 , H01L2224/05684 , H01L2924/00014 , H01L2224/05639 , H01L2924/00014 , H01L2224/05644 , H01L2924/00014 , H01L2224/03464 , H01L2924/00014 , H01L2224/81815 , H01L2924/00014 , H01L2224/81805 , H01L2924/00014 , H01L2224/81825 , H01L2924/00014 , H01L2224/8183 , H01L2924/00014 , H01L2224/05655 , H01L2924/00014
摘要: Connector structures and methods of forming the same are provided. A method includes forming a first patterned passivation layer on a workpiece, the first patterned passivation layer having a first opening exposing a conductive feature of the workpiece. A seed layer is formed over the first patterned passivation layer and in the first opening. A patterned mask layer is formed over the seed layer, the patterned mask layer having a second opening exposing the seed layer, the second opening overlapping with the first opening. A connector is formed in the second opening. The patterned mask layer is partially removed, an unremoved portion of the patterned mask layer remaining in the first opening. The seed layer is patterned using the unremoved portion of the patterned mask layer as a mask.
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公开(公告)号:US20230369049A1
公开(公告)日:2023-11-16
申请号:US18350583
申请日:2023-07-11
发明人: Chang-Jung Hsueh , Chen-En Yen , Chin Wei Kang , Kai Jun Zhan , Wei-Hung Lin , Cheng Jen Lin , Ming-Da Cheng , Ching-Hui Chen , Mirng-Ji Lii
IPC分类号: H01L21/033 , H01L21/311 , H01L21/3105 , H01L21/3213 , H01L21/027
CPC分类号: H01L21/0337 , H01L21/31144 , H01L21/31058 , H01L21/0332 , H01L21/31116 , H01L21/32135 , H01L21/32139 , H01L21/0273
摘要: A method includes depositing a plurality of layers on a substrate, patterning a first mask overlying the plurality of layers, and performing a first etching process on the plurality of layers using the first mask. The method also includes forming a polymer material along sidewalls of the first mask and sidewalls of the plurality of layers, and removing the polymer material. The method also includes performing a second etching process on the plurality of layers using the remaining first mask, where after the second etching process terminates a combined sidewall profile of the plurality of layers comprises a first portion and a second portion, and a first angle of the first portion and a second angle of the second portion are different to each other.
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公开(公告)号:US11728217B2
公开(公告)日:2023-08-15
申请号:US17379775
申请日:2021-07-19
发明人: Chen-Hua Yu , Kuo-Chung Yee , Mirng-Ji Lii , Chien-Hsun Lee , Jiun Yi Wu
IPC分类号: H01L25/00 , H01L25/065 , H01L21/768 , H01L21/56 , H01L23/00 , H01L25/10 , H01L23/31 , H01L23/538 , H01L23/498
CPC分类号: H01L21/76898 , H01L21/568 , H01L24/19 , H01L25/105 , H01L25/50 , H01L23/3128 , H01L23/49811 , H01L23/5389 , H01L24/73 , H01L25/0657 , H01L2224/12105 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/16225 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2224/81005 , H01L2224/81192 , H01L2224/83005 , H01L2224/92125 , H01L2224/92244 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/00 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2224/16225 , H01L2224/32225 , H01L2924/00 , H01L2924/12042 , H01L2924/00 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00012 , H01L2924/181 , H01L2924/00 , H01L2224/73204 , H01L2224/16145 , H01L2224/32145 , H01L2924/00012 , H01L2224/45144 , H01L2924/00 , H01L2224/45144 , H01L2924/00014 , H01L2224/45147 , H01L2924/00 , H01L2924/181 , H01L2924/00012
摘要: An embodiment is a package including a first package component. The first package component including a first die attached to a first side of a first interconnect structure, a molding material surrounding the first die, and a second interconnect structure over the molding material and the first die, a first side of the second interconnect structure coupled to the first die with first electrical connectors. The first package component further includes a plurality of through molding vias (TMVs) extending through the molding material, the plurality of TMVs coupling the first interconnect structure to the second interconnect structure, and a second die attached to a second side of the second interconnect structure with second electrical connectors, the second side of the second interconnect structure being opposite the first side of the second interconnect structure.
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