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公开(公告)号：US09736925B2
公开(公告)日：2017-08-15
申请号：US14607695
申请日：2015-01-28
Applicant: STMicroelectronics S.r.l.
Inventor： Federico Giovanni Ziglioli
CPC classification number: H05K1/0237 , H01L21/561 , H01L23/13 , H01L23/3121 , H01L23/552 , H01L24/06 , H01L24/32 , H01L24/37 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/04042 , H01L2224/06135 , H01L2224/32145 , H01L2224/32225 , H01L2224/37124 , H01L2224/37139 , H01L2224/37144 , H01L2224/37624 , H01L2224/37647 , H01L2224/45014 , H01L2224/45032 , H01L2224/45099 , H01L2224/45124 , H01L2224/45139 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48227 , H01L2224/48235 , H01L2224/48464 , H01L2224/49175 , H01L2224/73265 , H01L2224/83 , H01L2224/85 , H01L2224/92247 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06537 , H01L2225/06568 , H01L2924/00 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01034 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1461 , H01L2924/15153 , H01L2924/15311 , H01L2924/15313 , H01L2924/19107 , H05K7/02 , H01L2224/84
Abstract: A packaged device has a die of semiconductor material bonded to a support. An electromagnetic shielding structure surrounds the die and is formed by a grid structure of conductive material extending into the support and an electromagnetic shield, coupled together. A packaging mass embeds both the die and the electromagnetic shield. The electromagnetic shield is formed by a plurality of metal ribbon sections overlying the die and embedded in the packaging mass. Each metal ribbon section has a thickness-to-width ratio between approximately 1:2 and approximately 1:50.
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32.发明授权Planar electric board with pliable wings and system for sensing components along three coordinate axis of inner forces in a block made of a building material 有权具有柔韧翼的平面电板和用于在由建筑材料制成的块中的内力的三坐标轴上感测部件的系统公开(公告)号：US08967000B2
公开(公告)日：2015-03-03
申请号：US14027990
申请日：2013-09-16
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Pagani , Federico Giovanni Ziglioli
CPC classification number: G01L1/005 , G01N33/38 , H05K1/0239 , H05K1/0278 , H05K1/189 , H05K2201/09081 , H05K2201/10098 , H05K2201/10151 , Y10T156/1051
Abstract: A planar electric circuit board may include a planar support of a foldable material defining a base surface and wings coupled to the base surface along respective folding lines so that the wings, when folded along the folding lines, are erected with respect to the base surface and remain in that position. An auxiliary circuit is on the planar support and may include pairs of capacitive coupling plates defined on the wings and on the base surface, and electric communication lines coupled to corresponding ones of the pairs of capacitive coupling plates.
Abstract translation: 平面电路板可以包括限定基部表面的可折叠材料的平面支撑件和沿着各个折叠线连接到基座表面的翼片，使得当沿着折叠线折叠时的翼片相对于基部表面竖立，并且 保持在这个位置。 辅助电路在平面支撑件上，并且可以包括限定在翼部和基部表面上的成对的电容耦合板，以及耦合到成对的电容耦合板中的对应的电气通信线。
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公开(公告)号：US08854830B2
公开(公告)日：2014-10-07
申请号：US13779592
申请日：2013-02-27
Applicant: STMicroelectronics S.r.l.
IPC: H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10 , H05K1/02 , H01L23/498 , B81B7/00 , H01L23/00 , H01L23/31
CPC classification number: H05K1/0271 , B81B7/0048 , B81B2207/07 , H01L23/3121 , H01L23/49838 , H01L23/562 , H01L2924/0002 , H01L2924/1433 , H01L2924/3511 , H01L2924/00
Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of said layer groups including at least one metal support zone; one pair of solder mask layers covering the outermost metal layers of the at least one pair of metal layers; and a plurality of routing lines; wherein the at least one metal support zone is formed so that it lies beneath at least one side of the base of the damage-sensitive device and so as to occupy a substantial portion of the area beneath the damage-sensitive device which is free of said routing lines; a method for the production of such substrate is also described.
Abstract translation: 一种适用于支撑损伤敏感器件的半导体封装衬底，包括具有第一和相对表面的衬底芯; 覆盖封装衬底芯的第一和相对表面的至少一对金属层，其限定第一和相对的金属层组，所述层组中的至少一个包括至少一个金属支撑区; 一对焊接掩模层，覆盖至少一对金属层的最外层金属层; 和多条路线; 其中所述至少一个金属支撑区域被形成为使得其位于所述损伤敏感装置的所述基部的至少一侧的下方，并且占据所述损伤敏感装置下方的所述区域的大部分，所述损伤敏感装置没有所述 路线; 还描述了制造这种基板的方法。
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34.发明申请PACKAGED DEVICE EXPOSED TO ENVIRONMENTAL AIR AND LIQUIDS AND MANUFACTURING METHOD THEREOF 有权暴露于环境空气和液体的包装设备及其制造方法公开(公告)号：US20140061892A1
公开(公告)日：2014-03-06
申请号：US14013730
申请日：2013-08-29
Applicant: STMicroelectronics S.r.l.
Inventor： Federico Giovanni Ziglioli , Fulvio Vittorio Fontana , Luca Maggi
CPC classification number: B81B7/0077 , B81B7/0058 , B81B2201/0264 , B81C1/00333 , B81C2203/0118 , H01L2224/48091 , H01L2224/48145 , H04R1/086 , H04R19/04 , H04R2201/003 , H01L2924/00014 , H01L2924/00012
Abstract: A packaged device, wherein at least one sensitive portion of a chip is enclosed in a chamber formed by a package. The package has an air-permeable area having a plurality of holes and a liquid-repellent structure so as to enable passage of air between an external environment and the chamber and block the passage of liquids.
Abstract translation: 一种封装器件，其中芯片的至少一个敏感部分被封装在由封装形成的腔室中。 该包装具有透气区域，具有多个孔和拒水结构，以使得能够在外部环境和室之间通过空气并阻止液体的通过。
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35.发明申请公开(公告)号：US20130170166A1
公开(公告)日：2013-07-04
申请号：US13779592
申请日：2013-02-27
Applicant: STMicroelectronics S.r.l.
IPC: H05K1/02
CPC classification number: H05K1/0271 , B81B7/0048 , B81B2207/07 , H01L23/3121 , H01L23/49838 , H01L23/562 , H01L2924/0002 , H01L2924/1433 , H01L2924/3511 , H01L2924/00
Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of said layer groups including at least one metal support zone; one pair of solder mask layers covering the outermost metal layers of the at least one pair of metal layers; and a plurality of routing lines; wherein the at least one metal support zone is formed so that it lies beneath at least one side of the base of the damage-sensitive device and so as to occupy a substantial portion of the area beneath the damage-sensitive device which is free of said routing lines; a method for the production of such substrate is also described.
Abstract translation: 一种适用于支撑损伤敏感器件的半导体封装衬底，包括具有第一和相对表面的衬底芯; 覆盖封装衬底芯的第一和相对表面的至少一对金属层，其限定第一和相对的金属层组，所述层组中的至少一个包括至少一个金属支撑区; 一对焊接掩模层，覆盖至少一对金属层的最外层金属层; 和多条路线; 其中所述至少一个金属支撑区域被形成为使得其位于所述损伤敏感装置的所述基部的至少一侧的下方，并且占据所述损伤敏感装置下方的所述区域的大部分，所述损伤敏感装置没有所述 路线; 还描述了制造这种基板的方法。
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Patent Agency Ranking
公开(公告)号：US12033926B2
公开(公告)日：2024-07-09
申请号：US17498328
申请日：2021-10-11
Applicant: STMicroelectronics S.r.l.
Inventor： Federico Giovanni Ziglioli
IPC: H01L23/00 , H01L21/48 , H01L21/768 , H01L23/31 , H01L23/498 , H01L21/60
CPC classification number: H01L23/49816 , H01L21/4853 , H01L21/76894 , H01L23/3135 , H01L23/49861 , H01L24/13 , H01L2021/60112 , H01L2224/13
Abstract: A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.
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公开(公告)号：US11842954B2
公开(公告)日：2023-12-12
申请号：US17887838
申请日：2022-08-15
Applicant: STMicroelectronics S.r.l.
Inventor： Federico Giovanni Ziglioli , Alberto Pintus , Pierangelo Magni
IPC: H01L23/495 , H01L21/48 , H01L21/56
CPC classification number: H01L23/49586 , H01L21/481 , H01L21/4825 , H01L21/565 , H01L23/49506
Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.
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公开(公告)号：US11808650B2
公开(公告)日：2023-11-07
申请号：US17063147
申请日：2020-10-05
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Pagani , Federico Giovanni Ziglioli , Bruno Murari
CPC classification number: G01L5/0038 , F16B31/028 , G01L1/18 , G01L1/20 , G01L5/243
Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.
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公开(公告)号：US11133242B2
公开(公告)日：2021-09-28
申请号：US17015619
申请日：2020-09-09
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Michele Derai , Federico Giovanni Ziglioli
IPC: H01L23/495 , H01L23/31 , H01L23/00 , H01L21/56
Abstract: A method of manufacturing semiconductor devices such as integrated circuits comprises: providing one or more semiconductor chips having first and second opposed surfaces, coupling the semiconductor chip or chips with a support substrate with the second surface towards the support substrate, embedding the semiconductor chip or chips coupled with the support substrate in electrically-insulating packaging material by providing in the packaging material electrically-conductive passageways. The electrically-conductive passageways comprise: electrically-conductive chip passageways towards the first surface of the at least one semiconductor chip, and/or electrically-conductive substrate passageways towards the support substrate.
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公开(公告)号：US10964646B2
公开(公告)日：2021-03-30
申请号：US15854456
申请日：2017-12-26
Applicant: STMicroelectronics S.r.l.
Abstract: A method of making an integrated circuit (IC) includes forming circuitry over a top surface of a semiconductor substrate having the top surface and an opposite bottom surface. An antenna is formed in an interconnect layer formed above the semiconductor substrate, where the antenna is coupled to circuitry. A seal ring is formed around a periphery of the interconnect layer. The seal ring is disposed around the antenna and the circuitry. A trench with a solid-state insulating material is formed. The trench extends vertically into the semiconductor substrate and extends laterally across the IC.
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