公开(公告)号：US20190011772A1

公开(公告)日：2019-01-10

申请号：US15745062

申请日：2017-08-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Qi Yao ,  Zhanfeng Cao ,  Feng Zhang ,  Haixu Li ,  Shengguang Ban ,  Yingwei Liu

IPC: G02F1/1335 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1362 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/786

Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, an active layer, and a first polarization structure. The active layer is disposed on the base substrate; the first polarization structure is disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate is at least partially overlapped with an orthographic projection of the active layer on the base substrate.

公开(公告)号：US09905705B2

公开(公告)日：2018-02-27

申请号：US15096807

申请日：2016-04-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiangchun Kong ,  Zhanfeng Cao ,  Wei Zhang ,  Bin Zhang ,  Xiaolong He ,  Jincheng Gao ,  Qi Yao ,  Zhengliang Li ,  Chuanxiang Xu

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: H01L29/78696 ,  G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2001/136222 ,  G02F2201/40 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78603

Abstract: A thin film transistor, an array substrate and a display device are provided by the present disclosure. The thin film transistor is on a base substrate, a profile of a width edge of the channel includes an up-and-down curved section in a direction perpendicular to a surface of the base substrate.

公开(公告)号：US09812579B2

公开(公告)日：2017-11-07

申请号：US15149587

申请日：2016-05-09

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jincheng Gao ,  Bin Zhang ,  Xiaolong He ,  Xiangchun Kong ,  Qi Yao ,  Zhanfeng Cao ,  Zhengliang Li

IPC: H01L29/786 ,  H01L29/45 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A thin film transistor, a method of fabricating the same, an array substrate and a display device are disclosed. The method of fabricating the thin film transistor comprises: forming a semiconductor layer; forming a conductive film that does not react with acid solution on the semiconductor layer to be employed as a protective layer; forming a source electrode and a drain electrode on the protective layer; and removing a portion of the protective layer between the source electrode and the drain electrode to expose a portion of the semiconductor layer between the source electrode and the drain electrode.

公开(公告)号：US09804463B2

公开(公告)日：2017-10-31

申请号：US14126941

申请日：2012-12-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng Cao ,  Xiaoyang Tong ,  Qi Yao

IPC: G02F1/1368 ,  H01L29/417 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/1362 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/78633

Abstract: Embodiments of the invention provide an array substrate and a fabrication method thereof and a display device. The fabrication method of an array substrate includes: forming a semiconductor active layer, a gate insulating layer and a gate electrode on a substrate; forming a light-shielding layer; forming a first color filter layer, forming a second color filter layer and forming a third color filter layer; and forming via holes that respectively penetrate through the first color filter layer, the second color filter layer and the third color filter layers; and forming a pixel electrode and source and drain electrodes.

公开(公告)号：US20170184931A1

公开(公告)日：2017-06-29

申请号：US15314695

申请日：2016-04-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Zhanfeng Cao ,  Qi Yao

IPC: G02F1/1362 ,  G02F1/1339 ,  G02F1/1343 ,  G02F1/1333

CPC classification number: G02F1/136209 ,  G02F1/133308 ,  G02F1/133345 ,  G02F1/13394 ,  G02F1/134309 ,  G02F1/136286 ,  G02F2001/133354 ,  G02F2001/13398 ,  G02F2001/134372 ,  G02F2001/134381 ,  G02F2001/13606 ,  G02F2001/136222 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2201/40 ,  G02F2202/16

Abstract: An array substrate and a manufacturing method thereof and a display device are disclosed. The array substrate includes a base substrate, and a color filter layer, a common electrode and a black matrix disposed on the base substrate, the black matrix is capable of conducting electricity, and the black matrix is electrically connected with the common electrode. The array substrate can reduce parasitic capacitance, and decrease power consumption.

公开(公告)号：US09606393B2

公开(公告)日：2017-03-28

申请号：US14421944

申请日：2014-07-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Zhang ,  Guanbao Hui ,  Zhanfeng Cao ,  Qi Yao

IPC: H01L27/32 ,  G02F1/1335 ,  H01L21/027 ,  H01L51/50 ,  H01L27/12 ,  G02F1/1362

CPC classification number: G02F1/133516 ,  G02F1/133512 ,  G02F1/136209 ,  G02F2001/136222 ,  H01L21/0274 ,  H01L27/1288 ,  H01L27/3295 ,  H01L51/5012

Abstract: A fabrication method of a substrate, relates to a field of a display technology, which can avoid a deviation between a line width of a black matrix or a color filter layer actually fabricated and a preset line width, so that the black matrix can just completely shield thin film transistor, a data line and a gate line, and meanwhile the black matrix or the color filter layer more refined are obtained, which improves the display effect of the liquid crystal display. The fabrication method of the substrate comprises: forming a to-be-treated layer, forming a light-shielding layer on the to-be-treated layer, and forming a pattern of the light-shielding layer by a patterning process, wherein the light-shielding layer is made of metal; performing a patterning process on the to-be-treated layer by using the pattern of the light-shielding layer as a mask; and removing the light-shielding layer.

公开(公告)号：US09515095B2

公开(公告)日：2016-12-06

申请号：US14422843

申请日：2014-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Qi Yao ,  Zhiyong Liu

IPC: H01L27/12 ,  H01L21/77 ,  G02F1/1343 ,  H01L29/45

CPC classification number: H01L27/124 ,  G02F1/134336 ,  G02F1/13439 ,  G02F2001/134372 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1259 ,  H01L29/458

Abstract: The invention belongs to the field of display technology, and particularly provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and a thin film transistor and at least one driving electrode provided on the base substrate, and the thin film transistor includes a gate, and a source and a drain provided in the same layer, wherein the gate, the source or the drain is formed with the same material as the at least one driving electrode, and thickness thereof is larger than that of the at least one driving electrode. Regarding the array substrate, the manufacturing procedure of the array substrate is effectively simplified, cost for mask plate and material is reduced, equipment investment is reduced, production cost is saved, productivity is improved, and competitiveness of the display device is increased, while the transmittance requirement is met.

Abstract translation: 本发明属于显示技术领域，特别是提供阵列基板及其制造方法以及显示装置。 阵列基板包括基底基板和薄膜晶体管以及设置在基底基板上的至少一个驱动电极，薄膜晶体管包括栅极以及设置在同一层中的源极和漏极，其中栅极， 源极或漏极由与至少一个驱动电极相同的材料形成，并且其厚度大于至少一个驱动电极的厚度。 关于阵列基板，阵列基板的制造工序被有效地简化，掩模板和材料的成本降低，设备投资减少，生产成本节省，生产率提高，显示装置的竞争力增加，而 满足透光率要求。

公开(公告)号：US09487867B2

公开(公告)日：2016-11-08

申请号：US14495409

申请日：2014-09-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Qi Yao ,  Feng Zhang ,  Zhanfeng Cao ,  Zhengliang Li

IPC: C23C30/00 ,  H01L29/786 ,  C23C8/12 ,  H01L21/28

CPC classification number: C23C30/00 ,  C23C8/12 ,  H01L21/28008 ,  H01L29/786

Abstract: The present invention discloses a method for preparing a film and a method for preparing an array substrate, and an array substrate. The method for preparing a film comprises forming an AB alloy film subjected to oxidation treatment and forming a first metal A film, wherein the first metal A film is provided to contact with the AB alloy film subjected to oxidation treatment, wherein A is a first metal and B is a second metal, the second metal is selected from active metals in period 2 to period 4 of group 2, and the AB alloy film subjected to oxidation treatment is formed by forming an alloy film of a first metal A and a second metal B in the presence of an oxygen-containing gas.

Abstract translation: 本发明公开了一种薄膜的制造方法及阵列基板的制造方法以及阵列基板。 制备薄膜的方法包括：形成经过氧化处理的AB合金薄膜，并形成第一金属薄膜，其中第一金属薄膜设置成与经过氧化处理的AB合金膜接触，其中A是第一金属 B为第二金属，第二金属选自组2的周期2至周期4中的活性金属，经过氧化处理的AB合金膜通过形成第一金属A和第二金属 B在含氧气体存在下。

公开(公告)号：US09465269B2

公开(公告)日：2016-10-11

申请号：US14429830

申请日：2014-07-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Zhang ,  Zhanfeng Cao ,  Qi Yao

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1335 ,  H01L21/28 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/134363 ,  G02F1/13439 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L21/28 ,  H01L27/124 ,  H01L27/1259

Abstract: An array substrate, a method for fabricating the same and a display device comprising the array substrate are disclosed. The array substrate includes: a base substrate; a plurality of gate lines (s1, s2, s3) and a plurality of data lines (d1, d2, d3) disposed on the base substrate as intersecting with each other to define a plurality of pixel regions (A, B, C, D); a first transparent electrode disposed in each of the pixel regions (A, B, C, D). The array substrate further includes: an insulation element, wherein the insulation element is disposed between two adjacent first transparent electrodes, a top surface of the insulation element is higher than a top surface of the first transparent electrode, and a bottom surface of the insulation element is lower than the top surface of the first transparent electrode. The array substrate may reduce the electric field interference between adjacent first transparent electrodes.

Abstract translation: 公开了阵列基板，其制造方法和包括阵列基板的显示装置。 阵列基板包括：基底; 多个栅极线（s1，s2，s3）和多个数据线（d1，d2，d3），设置在基底基板上彼此相交以限定多个像素区域（A，B，C，D ）; 设置在每个像素区域（A，B，C，D）中的第一透明电极。 阵列基板还包括：绝缘元件，其中所述绝缘元件设置在两个相邻的第一透明电极之间，所述绝缘元件的顶表面高于所述第一透明电极的顶表面，并且所述绝缘元件的底表面 低于第一透明电极的顶表面。 阵列基板可以减小相邻的第一透明电极之间的电场干扰。

公开(公告)号：US09159805B2

公开(公告)日：2015-10-13

申请号：US13704704

申请日：2012-09-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Tianming Dai ,  Jianshe Xue ,  Qi Yao ,  Feng Zhang

IPC: H01L29/04 ,  H01L29/10 ,  H01L29/66 ,  H01L27/32 ,  H01L29/16 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368

CPC classification number: H01L29/66742 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/3262 ,  H01L29/1606 ,  H01L29/78684

Abstract: Embodiments of the present invention provide a thin film transistor (TFT) array substrate and a method for manufacturing the same and a display device. The TFT array substrate improves a structure of a TFT array substrate and has a small thickness, and process flow is simplified. The method for manufacturing a thin film transistor (TFT) array substrate comprises: obtaining a gate line and a gate electrode through a first patterning process on a glass substrate; forming a gate insulating layer on the gate line and the gate electrode; forming a graphene layer on the gate insulating layer, and obtaining a semiconductor active layer over the gate electrode by a second patterning process and a hydrogenation treatment; obtaining a data line, a source electrode, a drain electrode and a pixel electrode which are located on the same layer by a third patterning process; and forming a protection layer on the data line, the source electrode, the semiconductor active layer, the drain electrode and the pixel electrode.

Abstract translation: 本发明的实施例提供一种薄膜晶体管（TFT）阵列基板及其制造方法和显示装置。 TFT阵列基板改善了TFT阵列基板的结构，并且具有小的厚度，并且工艺流程被简化。 制造薄膜晶体管（TFT）阵列基板的方法包括：通过玻璃基板上的第一图案化工艺获得栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在所述栅极绝缘层上形成石墨烯层，并通过第二图案化工艺和氢化处理获得所述栅电极上的半导体活性层; 通过第三图案化工艺获得位于同一层上的数据线，源电极，漏电极和像素电极; 在数据线，源电极，半导体有源层，漏电极和像素电极上形成保护层。