公开(公告)号：US09159805B2

公开(公告)日：2015-10-13

申请号：US13704704

申请日：2012-09-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Tianming Dai ,  Jianshe Xue ,  Qi Yao ,  Feng Zhang

IPC: H01L29/04 ,  H01L29/10 ,  H01L29/66 ,  H01L27/32 ,  H01L29/16 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368

CPC classification number: H01L29/66742 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/3262 ,  H01L29/1606 ,  H01L29/78684

Abstract: Embodiments of the present invention provide a thin film transistor (TFT) array substrate and a method for manufacturing the same and a display device. The TFT array substrate improves a structure of a TFT array substrate and has a small thickness, and process flow is simplified. The method for manufacturing a thin film transistor (TFT) array substrate comprises: obtaining a gate line and a gate electrode through a first patterning process on a glass substrate; forming a gate insulating layer on the gate line and the gate electrode; forming a graphene layer on the gate insulating layer, and obtaining a semiconductor active layer over the gate electrode by a second patterning process and a hydrogenation treatment; obtaining a data line, a source electrode, a drain electrode and a pixel electrode which are located on the same layer by a third patterning process; and forming a protection layer on the data line, the source electrode, the semiconductor active layer, the drain electrode and the pixel electrode.

Abstract translation: 本发明的实施例提供一种薄膜晶体管（TFT）阵列基板及其制造方法和显示装置。 TFT阵列基板改善了TFT阵列基板的结构，并且具有小的厚度，并且工艺流程被简化。 制造薄膜晶体管（TFT）阵列基板的方法包括：通过玻璃基板上的第一图案化工艺获得栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在所述栅极绝缘层上形成石墨烯层，并通过第二图案化工艺和氢化处理获得所述栅电极上的半导体活性层; 通过第三图案化工艺获得位于同一层上的数据线，源电极，漏电极和像素电极; 在数据线，源电极，半导体有源层，漏电极和像素电极上形成保护层。

公开(公告)号：US09099440B2

公开(公告)日：2015-08-04

申请号：US13991371

申请日：2012-11-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Qi Yao ,  Tianming Dai ,  Feng Zhang ,  Zhanfeng Cao ,  Peiyu Zhu

IPC: H01L21/00 ,  H01L21/467 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/45

CPC classification number: H01L21/467 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: Embodiments of the present invention disclose a manufacturing method of an array substrate, an array substrate and a display. The manufacturing method comprises: forming a gate electrode of a TFT on a substrate; forming a metal oxide semiconductor thin film and a top metal thin film, and performing a mask process to the metal oxide semiconductor thin film and the top metal thin film, in order to form an active layer opposing the gate electrode and a source electrode and a drain electrode of the TFT respectively; and forming a passivation layer overlying the source electrode and the drain electrode, wherein during the mask process to the top metal thin film, a hydrogen peroxide-based etchant with a pH value between 6 and 8 is used to etch the top metal thin film.

Abstract translation: 本发明的实施例公开了阵列基板，阵列基板和显示器的制造方法。 制造方法包括：在基板上形成TFT的栅电极; 形成金属氧化物半导体薄膜和顶部金属薄膜，并且对金属氧化物半导体薄膜和顶部金属薄膜进行掩模处理，以便形成与栅电极和源电极相对的有源层和 TFT的漏电极; 以及形成覆盖源极和漏电极的钝化层，其中在对顶部金属薄膜的掩模处理期间，使用pH值在6和8之间的基于过氧化氢的蚀刻剂来蚀刻顶部金属薄膜。

公开(公告)号：US20140212659A1

公开(公告)日：2014-07-31

申请号：US13995463

申请日：2012-09-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianming Dai ,  Jianshe Xue

IPC: H01B1/04 ,  B32B9/04

CPC classification number: H01B1/04 ,  B32B9/007 ,  B32B9/041 ,  B32B9/045 ,  B32B27/281 ,  B32B27/304 ,  B32B27/32 ,  B32B27/36 ,  B32B27/365 ,  B32B27/38 ,  B32B37/025 ,  B32B2307/21 ,  B32B2307/412 ,  B32B2307/536 ,  B32B2307/584 ,  B32B2457/20 ,  C09K3/16 ,  H01L51/524 ,  Y10T428/265 ,  Y10T428/266 ,  Y10T428/30

Abstract: Embodiments of the present invention provide an antistatic protective film, a display device, and a preparation method of an antistatic protective film. The antistatic protective film comprises: a layer of substrate and a layer of graphene; the substrate and the graphene layer are adhered together. The antistatic protective film in accordance with the embodiment of the present invention, utilizes graphene to protect a component from being scratched by a foreign object or damaged by rubbing, and at the same time allows static electricity on an electronic component to be discharged in time, thus avoids the electronic component from being damaged by static electricity and prolongs the service life of the electronic component; meanwhile, the antistatic protective film has high light-transmittance, which greatly reduces the influence of the antistatic protective film on the output light of the electronic component.

Abstract translation: 本发明的实施例提供一种抗静电保护膜，显示装置和抗静电保护膜的制备方法。 抗静电保护膜包括：一层基底和一层石墨烯; 基板和石墨烯层粘合在一起。 根据本发明的实施方案的抗静电保护膜利用石墨烯来保护组分不被异物刮伤或被摩擦损坏，并且同时允许电子部件上的静电及时排出， 从而避免电子部件受到静电损伤，延长电子部件的使用寿命; 同时，抗静电保护膜具有高透光率，大大降低了抗静电保护膜对电子部件的输出光的影响。

公开(公告)号：US09768306B2

公开(公告)日：2017-09-19

申请号：US15151396

申请日：2016-05-10

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianming Dai ,  Qi Yao ,  Feng Zhang ,  Zhangfeng Cao

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/22 ,  H01L29/24 ,  H01L27/12

CPC classification number: H01L29/78606 ,  H01L21/02304 ,  H01L21/02365 ,  H01L21/76841 ,  H01L21/8234 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/22 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: An array substrate and a display device are provided. A gate insulating layer and a gate electrode are formed on a semiconductor layer in sequence, the gate insulating layer and the gate electrode are located in a middle position of the semiconductor layer and have a uniform shape and size. In a region on the semiconductor layer that is not covered by the gate insulating layer, there is further provided a metal diffusion layer. A barrier layer includes a portion covering the gate insulating layer and the gate electrode and a portion located around the semiconductor layer. A passivation layer covers the semiconductor layer, the gate insulating layer, the gate electrode and the barrier layer. Source and drain electrodes are connected to the metal diffusion layer respectively, and a pixel electrode contacts with the drain electrode.

公开(公告)号：US20140110665A1

公开(公告)日：2014-04-24

申请号：US14059767

申请日：2013-10-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Zhang ,  Tianming Dai ,  Qi Yao

IPC: H01L51/50

CPC classification number: H01L51/502 ,  H01L51/5056 ,  H01L51/5092

Abstract: The embodiments of the present invention relate to a light emitting diode and manufacturing method thereof. The electroluminescent layer of the light-emitting diode is formed of graphene/compound semiconductor quantum dot composites.

Abstract translation: 本发明的实施例涉及一种发光二极管及其制造方法。 发光二极管的电致发光层由石墨烯/化合物半导体量子点复合体形成。

公开(公告)号：US20140070206A1

公开(公告)日：2014-03-13

申请号：US13981165

申请日：2012-11-15

Applicant: BOE Technology Group Co., LTD

Inventor： Tianming Dai ,  Qi Yao ,  Feng Zhang ,  Zhanfeng Cao

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L21/02304 ,  H01L21/02365 ,  H01L21/76841 ,  H01L21/8234 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/22 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A manufacturing method of an array substrate, comprising the following steps: S1: forming a pattern comprising a semiconductor layer (2), a gate insulating layer (4), a gate electrode (5) and a gate line on a substrate (1); S2: on the substrate (1) subjected to the step S1, forming a metal diffusion layer (3) on the pattern of the semiconductor layer (2) which is not covered by the gate insulating layer (4) and forming a barrier layer (6) in other regions; S3: forming a passivation layer (7) on the substrate (1) subjected to the step S2; and S4: forming a pattern of via holes (11), source and drain electrodes (81, 82), a data line and a pixel electrode (9) on the passivation layer (7), the source and drain electrodes (81, 82) being which being connected to the metal diffusion layer (3) through the via holes (11) respectively. With this method, the process flow is simplified, and the process costs are reduced.

Abstract translation: 阵列基板的制造方法，包括以下步骤：S1：在基板（1）上形成包括半导体层（2），栅极绝缘层（4），栅电极（5）和栅极线的图案， ; S2：在经过步骤S1的基板（1）上，在未被栅极绝缘层（4）覆盖并形成阻挡层（4）的半导体层（2）的图案上形成金属扩散层（3） 6）其他地区; S3：在经过步骤S2的基板（1）上形成钝化层（7）; 和S4：在钝化层（7）上形成通孔（11），源极和漏极（81,82），数据线和像素电极（9）的图案，源极和漏极（81,82 ）分别通过通孔（11）连接到金属扩散层（3）。 通过这种方法，简化了工艺流程，降低了工艺成本。

公开(公告)号：US20140054586A1

公开(公告)日：2014-02-27

申请号：US13991371

申请日：2012-11-21

Applicant: Boe Technology Group Co., Ltd.

Inventor： Qi Yao ,  Tianming Dai ,  Feng Zhang ,  Zhanfeng Cao ,  Peiyu Zhu

IPC: H01L21/467 ,  H01L27/12

CPC classification number: H01L21/467 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: Embodiments of the present invention disclose a manufacturing method of an array substrate, an array substrate and a display. The manufacturing method comprises: forming a gate electrode of a TFT on a substrate; forming a metal oxide semiconductor thin film and a top metal thin film, and performing a mask process to the metal oxide semiconductor thin film and the top metal thin film, in order to form an active layer opposing the gate electrode and a source electrode and a drain electrode of the TFT respectively; and forming a passivation layer overlying the source electrode and the drain electrode, wherein during the mask process to the top metal thin film, a hydrogen peroxide-based etchant with a pH value between 6 and 8 is used to etch the top metal thin film.

Abstract translation: 本发明的实施例公开了阵列基板，阵列基板和显示器的制造方法。 制造方法包括：在基板上形成TFT的栅电极; 形成金属氧化物半导体薄膜和顶部金属薄膜，并且对金属氧化物半导体薄膜和顶部金属薄膜进行掩模处理，以便形成与栅电极和源电极相对的有源层和 TFT的漏电极; 以及形成覆盖源极和漏电极的钝化层，其中在对顶部金属薄膜的掩模处理期间，使用pH值在6和8之间的基于过氧化氢的蚀刻剂来蚀刻顶部金属薄膜。

公开(公告)号：US09368635B2

公开(公告)日：2016-06-14

申请号：US13981165

申请日：2012-11-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Tianming Dai ,  Qi Yao ,  Feng Zhang ,  Zhanfeng Cao

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L21/02304 ,  H01L21/02365 ,  H01L21/76841 ,  H01L21/8234 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/22 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A manufacturing method of an array substrate, comprising the following steps: S1: forming a pattern comprising a semiconductor layer (2), a gate insulating layer (4), a gate electrode (5) and a gate line on a substrate (1); S2: on the substrate (1) subjected to the step S1, forming a metal diffusion layer (3) on the pattern of the semiconductor layer (2) which is not covered by the gate insulating layer (4) and forming a barrier layer (6) in other regions; S3: forming a passivation layer (7) on the substrate (1) subjected to the step S2; and S4: forming a pattern of via holes (11), source and drain electrodes (81, 82), a data line and a pixel electrode (9) on the passivation layer (7), the source and drain electrodes (81, 82) being which being connected to the metal diffusion layer (3) through the via holes (11) respectively. With this method, the process flow is simplified, and the process costs are reduced.

Abstract translation: 阵列基板的制造方法，包括以下步骤：S1：在基板（1）上形成包括半导体层（2），栅极绝缘层（4），栅电极（5）和栅极线的图案， ; S2：在经过步骤S1的基板（1）上，在未被栅极绝缘层（4）覆盖并形成阻挡层（4）的半导体层（2）的图案上形成金属扩散层（3） 6）其他地区; S3：在经过步骤S2的基板（1）上形成钝化层（7）; 和S4：在钝化层（7）上形成通孔（11），源极和漏极（81,82），数据线和像素电极（9）的图案，源极和漏极（81,82 ）分别通过通孔（11）连接到金属扩散层（3）。 通过这种方法，简化了工艺流程，降低了工艺成本。

公开(公告)号：US09147855B2

公开(公告)日：2015-09-29

申请号：US14059767

申请日：2013-10-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Zhang ,  Tianming Dai ,  Qi Yao

IPC: H01L51/00 ,  H01L21/00 ,  H01L51/50

CPC classification number: H01L51/502 ,  H01L51/5056 ,  H01L51/5092

Abstract: The embodiments of the present invention relate to a light emitting diode and manufacturing method thereof. The electroluminescent layer of the light-emitting diode is formed of graphene/compound semiconductor quantum dot composites.

Abstract translation: 本发明的实施例涉及一种发光二极管及其制造方法。 发光二极管的电致发光层由石墨烯/化合物半导体量子点复合体形成。

公开(公告)号：US08755104B2

公开(公告)日：2014-06-17

申请号：US13703655

申请日：2012-10-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Qi Yao ,  Jianshe Xue ,  Zhanfeng Cao ,  Tianming Dai ,  Feng Zhang

IPC: G02F1/03 ,  G02B26/02

CPC classification number: G02B26/005 ,  B32B37/14 ,  G02B26/02

Abstract: Embodiments of the present disclosure provide an electrowetting display panel and the manufacturing method thereof The electrowetting display panel comprises: a first glass substrate; a second glass substrate provided opposite to the first glass substrate; a cavity provided between the first glass substrate and the second glass substrate; a colored conductive liquid filled into the cavity; and a reflecting conductive element provided on the surface of the first glass substrate facing away from the second glass substrate, and corresponding to the cavity, wherein the reflecting conductive element is used for controlling the light transmissivity of the colored conductive liquid within the cavity according to the voltage applied to the reflecting conductive element and reflecting the light passing through the colored conductive liquid toward the second glass substrate.

Abstract translation: 本发明的实施例提供一种电润湿显示面板及其制造方法。电润湿显示面板包括：第一玻璃基板; 与第一玻璃基板相对设置的第二玻璃基板; 设置在所述第一玻璃基板和所述第二玻璃基板之间的空腔; 填充到空腔中的着色导电液体; 以及反射导电元件，其设置在所述第一玻璃基板的背离所述第二玻璃基板的表面上并且对应于所述空腔，其中所述反射导电元件用于根据所述反射导电元件控制所述着色导电液体在所述空腔内的透光率， 施加到反射导电元件的电压并将通过着色导电液体的光反射朝向第二玻璃基板。