公开(公告)号：US09006824B2

公开(公告)日：2015-04-14

申请号：US14249725

申请日：2014-04-10

Applicant: International Rectifier Corporation

Inventor： Timothy D. Henson

IPC: H01L29/78

CPC classification number: H01L29/7811 ,  H01L29/404 ,  H01L29/407 ,  H01L29/7813

Abstract: In one implementation, a power semiconductor device includes an active region and a termination region. A depletion trench finger extends from the active region and ends in the termination region. An arched depletion trench surrounds the depletion trench finger in the termination region, the arched depletion trench enables one or both of an increased breakdown voltage and a reduced on-resistance in the power semiconductor device.

Abstract translation: 在一个实施方式中，功率半导体器件包括有源区和端接区。 耗尽沟槽手指从活动区域延伸并终止在终止区域中。 拱形耗尽沟槽围绕终止区域中的耗尽沟槽指状物，拱形耗尽沟槽能够实现功率半导体器件中的一个或两个增加的击穿电压和降低的导通电阻。

公开(公告)号：US20150097196A1

公开(公告)日：2015-04-09

申请号：US14515233

申请日：2014-10-15

Applicant: International Rectifier Corporation

Inventor： Mike Briere

IPC: H01L27/06 ,  H01L29/16 ,  H01L29/20 ,  H01L29/06 ,  H01L29/04

CPC classification number: H01L27/0605 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02587 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/267

Abstract: A semiconductor device that includes one semiconductor device formed in one semiconductor material and a second semiconductor device formed in another semiconductor material on a common substrate, and a method of fabricating the semiconductor device.

Abstract translation: 一种半导体器件，其包括形成在一个半导体材料中的一个半导体器件和在公共衬底上形成在另一个半导体材料中的第二半导体器件，以及制造该半导体器件的方法。

公开(公告)号：US09000829B2

公开(公告)日：2015-04-07

申请号：US13794124

申请日：2013-03-11

Applicant: International Rectifier Corporation

Inventor： Marco Giandalia ,  Toshio Takahashi ,  Massimo Grasso

IPC: H03K17/56 ,  H02M7/537 ,  H02M7/5387

CPC classification number: H02M7/537 ,  H01L2224/48137 ,  H01L2224/49171 ,  H01L2224/49175 ,  H02M7/53875 ,  H01L2924/00

Abstract: According to an exemplary implementation, an integrated circuit (IC) includes a logic circuit monolithically formed on the IC. The logic circuit is configured to generate modulation signals for controlling power switches of a power inverter. The logic circuit generates the modulation signals based on at least one input value. The IC further includes a voltage level shifter monolithically formed on the IC. The voltage level shifter is configured to shift the modulation signals to a voltage level suitable for driving the power switches of the power inverter. The logic circuit can be a digital logic circuit and the input value can be a digital input value. The IC can also include a sense circuit monolithically formed on the IC. The sense circuit is configured to generate the input value.

Abstract translation: 根据示例性实现，集成电路（IC）包括在IC上单片形成的逻辑电路。 逻辑电路被配置为产生用于控制功率逆变器的功率开关的调制信号。 逻辑电路基于至少一个输入值产生调制信号。 IC还包括在IC上单片形成的电压电平移位器。 电压电平移位器被配置为将调制信号移动到适于驱动电力逆变器的功率开关的电压电平。 逻辑电路可以是数字逻辑电路，输入值可以是数字输入值。 IC还可以包括在IC上单片形成的感测电路。 感测电路被配置为生成输入值。

公开(公告)号：US08987883B2

公开(公告)日：2015-03-24

申请号：US14192756

申请日：2014-02-27

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Chuan Cheah

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49517 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L25/165 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10323 ,  H01L2924/1033 ,  H01L2924/10334 ,  H01L2924/10344 ,  H01L2924/10346 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: One exemplary disclosed embodiment comprises a high power semiconductor package configured as a buck converter having a control transistor and a sync transistor disposed on a common leadframe pad, a driver integrated circuit (IC) for driving the control and sync transistors, and conductive clips electrically coupling the top surfaces of the transistors to substrate pads such as leadframe pads. In this manner, the leadframe and the conductive clips provide efficient grounding or current conduction by direct mechanical connection and large surface area conduction, thereby enabling a package with significantly reduced electrical resistance, form factor, complexity, and cost when compared to conventional packaging methods using wirebonds for transistor interconnections.

Abstract translation: 一个示例性的公开的实施例包括被配置为具有控制晶体管和设置在公共引线框焊盘上的同步晶体管的降压转换器的高功率半导体封装，用于驱动控制和同步晶体管的驱动器集成电路（IC） 晶体管的顶表面到衬底焊盘，例如引线框焊盘。 以这种方式，引线框架和导电夹子通过直接机械连接和大的表面积传导提供有效的接地或电流传导，从而与使用以下的传统封装方法相比，能够实现具有显着降低的电阻，形状因素，复杂性和成本的封装 用于晶体管互连的引线。

公开(公告)号：US08969881B2

公开(公告)日：2015-03-03

申请号：US13750986

申请日：2013-01-25

Applicant: International Rectifier Corporation

Inventor： Michael A. Briere ,  Naresh Thapar

IPC: H01L31/0256

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/42368 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66477 ,  H01L29/7787 ,  H01L29/78

Abstract: There are disclosed herein various implementations of a transistor having a segmented gate region. Such a transistor may include at least one segmentation dielectric segment and two or more gate dielectric segments. The segmentation dielectric segment or segments are thicker than the gate dielectric segments, and is/are situated between the gate dielectric segments. The segmentation dielectric segment or segments cause an increase in the effective gate length so as to improve resistance to punch-through breakdown between a drain electrode and a source electrode of the transistor when the transistor is off.

Abstract translation: 这里公开了具有分段栅极区域的晶体管的各种实现方式。 这种晶体管可以包括至少一个分割电介质段和两个或更多个栅介质区段。 分段电介质段或段比栅介质段更厚，并且位于栅电介质段之间。 分段电介质段或段导致有效栅极长度的增加，以便当晶体管截止时，提高晶体管的漏电极和源极之间的穿通击穿阻力。

公开(公告)号：US20140375242A1

公开(公告)日：2014-12-25

申请号：US14302271

申请日：2014-06-11

Applicant: International Rectifier Corporation

Inventor： Michael A. Briere

IPC: H01L27/02 ,  H02P25/16

CPC classification number: H01L27/0207 ,  H02M1/32 ,  H02M1/36 ,  H02M5/297 ,  H02M7/5387 ,  H02P25/16 ,  H03K17/223 ,  H03K2017/066 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: There are disclosed herein various implementations of a half-bridge or multiple half-bridge switch configurations used in a voltage converter circuit using at least two normally ON switches. Such a circuit includes a high side switch and a low side switch coupled between a high voltage rail and a low voltage rail of the voltage converter circuit. The high side switch is coupled to the low side switch at a switch node of the voltage converter circuit. At least one group IV enhancement mode switch is used as an enable switch. The group IV enhancement mode enable switch may be an insulated gate bipolar transistor (IGBT), a super junction field-effect transistor (SJFET), a unipolar group IV field-effect transistor (FET), or a bipolar junction transistor (BJT).

Abstract translation: 这里公开了使用至少两个正常ON开关的电压转换器电路中使用的半桥或多个半桥开关配置的各种实施方式。 这种电路包括耦合在电压转换器电路的高压轨和低压轨之间的高侧开关和低侧开关。 高侧开关耦合到电压转换器电路的开关节点处的低侧开关。 使用至少一组IV增强模式开关作为使能开关。 组IV增强模式使能开关可以是绝缘栅双极晶体管（IGBT），超结场效应晶体管（SJFET），单极IV族场效应晶体管（FET）或双极结型晶体管（BJT）。

公开(公告)号：US08916908B2

公开(公告)日：2014-12-23

申请号：US13906280

申请日：2013-05-30

Applicant: International Rectifier Corporation

Inventor： Robert Beach ,  Paul Bridger

IPC: H01L29/66 ,  H01L29/205 ,  H01L29/778 ,  H01L29/06 ,  H01L29/10 ,  H01L29/20

CPC classification number: H01L29/778 ,  H01L29/0692 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/7787

Abstract: A III-nitride heterojunction semiconductor device having a III-nitride heterojunction that includes a discontinuous two-dimensional electron gas under a gate thereof.

Abstract translation: 具有III族氮化物异质结的III族氮化物异质结半导体器件，其在栅极下方包括不连续的二维电子气。

公开(公告)号：US08901742B2

公开(公告)日：2014-12-02

申请号：US13656461

申请日：2012-10-19

Applicant: International Rectifier Corporation

Inventor： Eung San Cho ,  Dean Fernando ,  Tim Philips ,  Dan Clavette

IPC: H01L23/48 ,  H01L23/04

CPC classification number: H01L24/40 ,  H01L23/481 ,  H01L23/492 ,  H01L23/49844 ,  H01L24/37 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/84 ,  H01L2224/05553 ,  H01L2224/37032 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40091 ,  H01L2224/40106 ,  H01L2224/40227 ,  H01L2224/40247 ,  H01L2224/40499 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/84205 ,  H01L2224/844 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: According to an exemplary embodiment, a monolithic power converter package includes a monolithic die over a substrate, the monolithic die integrating a driver integrated circuit (IC) with a control power transistor and a sync power transistor connected in a half-bridge. The high side power input and a power output of the half-bridge each are disposed on a top surface of the monolithic die. The high side power input is electrically coupled to the substrate through a high side power connection. The power output is electrically coupled to the substrate through a power output connection. The low side power input of the half-bridge comprises a plurality of through substrate vias that extend through the monolithic die to electrically connect a low side power pad to the monolithic die.

Abstract translation: 根据示例性实施例，单片功率转换器封装包括在衬底上的单片裸片，该单片模块集成驱动器集成电路（IC）与控制功率晶体管和以半桥连接的同步功率晶体管。 高侧功率输入和半桥的功率输出各自设置在整体模具的顶表面上。 高侧功率输入通过高侧电源连接电耦合到基板。 功率输出通过功率输出连接电耦合到衬底。 半桥的低边功率输入包括多个通过衬底通孔，其延伸穿过整体模具以将低侧功率垫电连接到整体模具。

公开(公告)号：US20140339670A1

公开(公告)日：2014-11-20

申请号：US14267787

申请日：2014-05-01

Applicant: International Rectifier Corporation

Inventor： Timothy D. Henson ,  Kapil Kelkar ,  Ljubo Radic

IPC: H01L29/40 ,  H01L21/765

CPC classification number: H01L29/407 ,  H01L21/3083 ,  H01L21/765 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66674 ,  H01L29/7801 ,  H01L29/7827

Abstract: Disclosed is a power device, such as a power MOSFET device and a method for fabricating same. The device includes a field plate trench. The field plate trench has a predetermined width and a predetermined sidewall angle. The device further includes a single trench dielectric on sidewalls of the field plate trench and at a bottom of the field plate trench. The single trench dielectric has a bottom thickness that is greater than a sidewall thickness. The device also includes a field plate situated within the single trench dielectric.

Abstract translation: 公开了功率器件，例如功率MOSFET器件及其制造方法。 该装置包括场板沟槽。 场板沟槽具有预定的宽度和预定的侧壁角。 该器件还包括在场板板沟槽的侧壁上和场板沟槽的底部的单沟槽电介质。 单沟槽电介质具有大于侧壁厚度的底部厚度。 该器件还包括位于单沟槽电介质内的场板。

公开(公告)号：US20140339651A1

公开(公告)日：2014-11-20

申请号：US14267726

申请日：2014-05-01

Applicant: International Rectifier Corporation

Inventor： Timothy D. Henson ,  Kapil Kelkar ,  Ljubo Radic

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/407 ,  H01L21/3083 ,  H01L21/765 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66674 ,  H01L29/7801 ,  H01L29/7827

Abstract: Disclosed is a power device, such as power MOSFET, and method for fabricating same. The device includes an upper trench situated over a lower trench, where the upper trench is wider than the lower trench. The device further includes a trench dielectric inside the lower trench and on sidewalls of the upper trench. The device also includes an electrode situated within the trench dielectric. The trench dielectric of the device has a bottom thickness that is greater than a sidewall thickness.

Abstract translation: 公开了诸如功率MOSFET的功率器件及其制造方法。 该器件包括位于下沟槽上方的上沟槽，其中上沟槽比下沟槽宽。 该器件还包括在下沟槽内部和沟槽上侧的沟槽电介质。 该器件还包括位于沟槽电介质内的电极。 器件的沟槽电介质具有大于侧壁厚度的底部厚度。