公开(公告)号：US09893048B2

公开(公告)日：2018-02-13

申请号：US14853701

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Changhan Hobie Yun ,  Daeik Daniel Kim ,  Chengjie Zuo ,  David Francis Berdy ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H01L27/12 ,  H01L27/01 ,  H01L49/02 ,  H01L23/522 ,  H01L23/15 ,  H01L21/48 ,  H01L21/70 ,  H01L23/498

CPC classification number: H01L27/01 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

公开(公告)号：US20170338034A1

公开(公告)日：2017-11-23

申请号：US15160776

申请日：2016-05-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  David Francis Berdy

IPC: H01F27/40 ,  H01F41/02 ,  H01F27/28 ,  H01F27/29 ,  H03H7/46 ,  H03H7/01

CPC classification number: H01F27/40 ,  H01F17/00 ,  H01F27/2823 ,  H01F27/29 ,  H01F27/292 ,  H01F41/02 ,  H01F2017/002 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H03H7/0115 ,  H03H7/466

Abstract: An apparatus includes a substrate and a three-dimensional (3D) wirewound inductor integrated within the substrate. The apparatus further includes a capacitor coupled to the 3D wirewound inductor.

公开(公告)号：US09807882B1

公开(公告)日：2017-10-31

申请号：US15239751

申请日：2016-08-17

Applicant: QUALCOMM Incorporated

Inventor： David Francis Berdy ,  Changhan Hobie Yun ,  Niranjan Sunil Mudakatte ,  Mario Francisco Velez ,  Chengjie Zuo ,  Jonghae Kim

IPC: H01L23/48 ,  H05K1/11 ,  H05K3/40 ,  H05K3/30 ,  H05K1/03 ,  H05K1/18 ,  H01F27/28 ,  H05K3/06 ,  H03H7/01 ,  H03H7/46 ,  H01L49/02 ,  H01L23/66 ,  H01Q1/48 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q1/24

CPC classification number: H05K1/181 ,  H01F27/2804 ,  H01L23/49822 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/552 ,  H01L23/645 ,  H01L23/66 ,  H01L24/06 ,  H01L28/10 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01Q1/241 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q1/48 ,  H03H7/0115 ,  H03H7/0138 ,  H03H7/46 ,  H05K1/0224 ,  H05K1/0271 ,  H05K1/144 ,  H05K3/06 ,  H05K3/303 ,  H05K2201/041 ,  H05K2201/045 ,  H05K2201/0715 ,  H05K2201/09136 ,  H05K2201/1003 ,  H05K2201/10378 ,  H05K2201/10674

Abstract: An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

公开(公告)号：US20170280562A1

公开(公告)日：2017-09-28

申请号：US15079811

申请日：2016-03-24

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  David Francis Berdy ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H05K1/18 ,  H05K3/10 ,  H05K3/40 ,  H03H7/01 ,  H05K3/30

CPC classification number: H05K1/181 ,  H01L21/56 ,  H01L23/12 ,  H01L23/15 ,  H01L23/28 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H03H7/0138 ,  H05K1/0218 ,  H05K1/141 ,  H05K3/10 ,  H05K3/303 ,  H05K3/4007 ,  H05K2201/042 ,  H05K2201/045 ,  H05K2201/09227 ,  H05K2201/1003 ,  H05K2201/10098 ,  H05K2201/10962 ,  H05K2201/2036

Abstract: Passive device assembly for accurate ground plane control is disclosed. A passive device assembly includes a device substrate conductively coupled to a ground plane separation control substrate. A passive device disposed on a lower surface of the device substrate is separated from an embedded ground plane mounted on a lower surface of the ground plane separation control substrate by a separation distance. The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.

公开(公告)号：US09673275B2

公开(公告)日：2017-06-06

申请号：US14920851

申请日：2015-10-22

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  Matthew Michael Nowak

IPC: H01L29/06 ,  H01L29/78 ,  H01L23/48 ,  H01L21/762 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L29/0653 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/823481 ,  H01L23/3128 ,  H01L23/481 ,  H01L29/78

Abstract: Isolated complementary metal-oxide semiconductor (CMOS) devices for radio-frequency (RF) circuits are disclosed. In some aspects, an RF circuit includes CMOS devices, a silicon substrate having doped regions that define the CMOS devices, and a trench through the silicon substrate. The trench through the silicon substrate forms a continuous channel around the doped regions of one of the CMOS devices to electrically isolate the CMOS device from other CMOS devices embodied on the silicon substrate. By so doing, performance characteristics of the CMOS device, such as linearity and signal isolation, may be improved over those of conventional CMOS devices (e.g., bulk CMOS).

公开(公告)号：US20170098663A1

公开(公告)日：2017-04-06

申请号：US15380800

申请日：2016-12-15

Applicant: QUALCOMM Incorporated

Inventor： Shiqun Gu ,  Daeik Daniel Kim ,  Matthew Michael Nowak ,  Jonghae Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  David Francis Berdy

IPC: H01L27/12 ,  H01L23/528 ,  H01L21/768 ,  H01L21/84 ,  H01L21/762 ,  H01L29/10 ,  H01L27/092

CPC classification number: H01L27/1203 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823481 ,  H01L21/84 ,  H01L23/49894 ,  H01L23/528 ,  H01L23/66 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1222 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1266 ,  H01L29/1087 ,  H01L29/66772

Abstract: An integrated circuit (IC) includes a glass substrate and a buried oxide layer. The IC additionally includes a first semiconductor device coupled to the glass substrate. The first semiconductor device includes a first gate and a first portion of a semiconductive layer coupled to the buried oxide layer. The first gate is located between the glass substrate and the first portion of the semiconductive layer and between the glass substrate and the buried oxide layer. The IC additionally includes a second semiconductor device coupled to the glass substrate. The second semiconductor device includes a second gate and a second portion of the semiconductive layer. The second gate is located between the glass substrate and the second portion of the semiconductive layer. The first portion is discontinuous from the second portion.

公开(公告)号：US09449753B2

公开(公告)日：2016-09-20

申请号：US14155244

申请日：2014-01-14

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Xiangdong Zhang ,  Jonghae Kim ,  Je-Hsiung Lan

IPC: H01F5/00 ,  H01F27/29 ,  H01F27/30 ,  H01F27/28 ,  H01F41/04 ,  H01F17/00

CPC classification number: H01F41/041 ,  H01F17/0013 ,  H01F27/2804 ,  H01F41/042 ,  H01F2017/0053 ,  H01F2017/0073 ,  H01F2027/2809

Abstract: A particular device includes a substrate and a spiral inductor coupled to the substrate. The spiral inductor includes a first conductive spiral and a second conductive spiral overlaying the first conductive spiral. A first portion of an innermost turn of the spiral inductor has a first thickness in a direction perpendicular to the substrate. The first portion of the innermost turn includes a first portion of the first conductive spiral and does not include the second conductive spiral. A second portion of the innermost turn includes a first portion of the second conductive spiral. A portion of an outermost turn of the spiral inductor has a second thickness in the direction perpendicular to the substrate that is greater than the first thickness. A portion of the outermost turn includes a second portion of the first conductive spiral and a second portion of the second conductive spiral.

Abstract translation: 特定器件包括衬底和耦合到衬底的螺旋电感器。 螺旋电感器包括覆盖第一导电螺旋的第一导电螺旋和第二导电螺旋。 螺旋电感器的最内圈的第一部分在垂直于衬底的方向上具有第一厚度。 最内圈的第一部分包括第一导电螺旋的第一部分，并且不包括第二导电螺旋。 最内圈的第二部分包括第二导电螺旋的第一部分。 螺旋电感器的最外圈的一部分在垂直于衬底的方向上具有大于第一厚度的第二厚度。 最外圈的一部分包括第一导电螺旋的第二部分和第二导电螺旋的第二部分。

公开(公告)号：US09343403B2

公开(公告)日：2016-05-17

申请号：US14483944

申请日：2014-09-11

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Jeffrey Lan ,  David Francis Berdy ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Niranjan Sunil Mudakatte ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H01L23/522 ,  H01L21/283 ,  H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L49/02

CPC classification number: H01L23/5227 ,  H01L21/283 ,  H01L21/76877 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5329 ,  H01L27/01 ,  H01L28/10 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit device includes a substrate. The integrated circuit device also includes a first conductive stack including a back-end-of-line (BEOL) conductive layer at a first elevation with reference to the substrate. The integrated circuit device also includes a second conductive stack including the BEOL conductive layer at a second elevation with reference to the substrate. The second elevation differs from the first elevation.

Abstract translation: 集成电路器件包括衬底。 集成电路器件还包括第一导电叠层，其包括参考衬底的第一高度处的后端行（BEOL）导电层。 集成电路器件还包括第二导电叠层，其包括相对于衬底的第二高度处的BEOL导电层。 第二个高程与第一个高程不同。

公开(公告)号：US09294064B2

公开(公告)日：2016-03-22

申请号：US13835211

申请日：2013-03-15

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Kyu-Pyung Hwang ,  Changhan Hobie Yun ,  Dong Wook Kim

IPC: H03H7/01 ,  H03H7/12 ,  H05K1/16 ,  H01G4/40 ,  H03H3/00

CPC classification number: H03H7/0115 ,  H01G4/40 ,  H03H3/00 ,  H03H7/12 ,  H05K1/162 ,  H05K2201/09236 ,  Y10T29/43 ,  Y10T29/49016

Abstract: A planar capacitor includes, in part, a first metal line forming spiral-shaped loops around one of its end point, and a second metal line forming spiral-shaped loops between the loops of the first metal line. The first and second metal lines are coplanar, formed on an insulating layer, and form the first and second plates of the planar capacitor. The planar capacitor may be used to form a filter. Such a filter includes a first metal line forming first spiral-shaped loops, a second metal line forming second spiral-shaped loops, and a third metal line—coplanar with the first and second metal lines—forming loops between the loops of the first and second metal lines. The filter further includes a first inductor coupled between the first and third metal lines, and a second inductor coupled between the second and third metal lines.

Abstract translation: 平面电容器部分地包括围绕其端点之一形成螺旋形环的第一金属线和在第一金属线的环之间形成螺旋形环的第二金属线。 第一和第二金属线是共面的，形成在绝缘层上，并形成平面电容器的第一和第二板。 平面电容器可以用于形成滤波器。 这种过滤器包括形成第一螺旋形环的第一金属线，形成第二螺旋状环的第二金属线和与第一和第二金属线形成环之间的第一和第二金属线形成环的第三金属线 - 共面， 第二条金属线 滤波器还包括耦合在第一和第三金属线之间的第一电感器和耦合在第二和第三金属线之间的第二电感器。

公开(公告)号：US09275786B2

公开(公告)日：2016-03-01

申请号：US14335609

申请日：2014-07-18

Applicant: QUALCOMM Incorporated

Inventor： David Francis Berdy ,  Chengjie Zuo ,  Daeik Daniel Kim ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Jonghae Kim

IPC: H01F5/00 ,  H01F27/28 ,  H01F27/29 ,  H01F41/04

CPC classification number: H01F41/041 ,  H01F17/0013 ,  H01F27/2804 ,  H01F27/29 ,  H01F2017/004 ,  H01L23/5227 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A three-dimensional (3D) orthogonal inductor pair is embedded in and supported by a substrate, and has a first inductor having a first coil that winds around a first winding axis and a second inductor having a second coil that winds around a second winding axis. The second winding axis is orthogonal to the first winding axis. The second winding axis intersects the first winding axis at an intersection point that is within the substrate.

Abstract translation: 三维（3D）正交电感器对被嵌入并由衬底支撑，并且具有第一电感器，其具有卷绕第一绕组轴线的第一线圈和具有卷绕第二绕组轴线的第二线圈的第二电感器 。 第二卷绕轴线与第一卷绕轴线正交。 第二绕组轴线在第一绕组轴线处于衬底内的交点处。