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    Methods of forming printable integrated circuit devices by selective etching to suspend the devices from a handling substrate and devices formed thereby
    17.
    发明授权
    Methods of forming printable integrated circuit devices by selective etching to suspend the devices from a handling substrate and devices formed thereby 有权
    通过选择性蚀刻来形成可印刷集成电路器件的方法，以将器件从处理衬底悬挂下来，以及由此形成的器件

    公开(公告)号：US08877648B2

    公开(公告)日：2014-11-04

    申请号：US12732868

    申请日：2010-03-26

    申请人： Christopher Bower ,  Etienne Menard ,  Matthew Meitl

    发明人： Christopher Bower ,  Etienne Menard ,  Matthew Meitl

    IPC分类号： H01L21/311

    CPC分类号： H01L27/1266 ,  H01L21/3065 ,  H01L21/32055 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/84 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78666

    摘要： Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. A step is performed to selectively etch through the semiconductor active layer and the sacrificial layer in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. A step can be performed to selectively etch through the capping layer and the first portion of the semiconductor active layer to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer.

    摘要翻译： 形成集成电路器件的方法包括在处理衬底上形成牺牲层并在牺牲层上形成半导体活性层。 执行步骤以依次选择性地蚀刻半导体有源层和牺牲层以限定绝缘体上半导体（SOI）衬底，其包括半导体有源层的第一部分。 可以在SOI衬底上形成多层电互连网络。 该多层电互连网络可以由与半导体有源层的第一部分的上表面接触的无机覆盖层封装。 可以执行步骤以选择性地蚀刻通过覆盖层和半导体有源层的第一部分，从而暴露牺牲层。 可以从半导体有源层的第一部分和处理衬底之间选择性地去除牺牲层，从而限定由封盖层封装的悬浮集成电路芯片。