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91.
公开(公告)号:US20240015214A1
公开(公告)日:2024-01-11
申请号:US18211964
申请日:2023-06-20
发明人: Samuel F. HISHMEH
IPC分类号: H04L67/1095
CPC分类号: H04L67/1095
摘要: In some embodiments, a system can include a first arbiter device connected to a first network, the first arbiter device communicating with a first communication interval, a second arbiter device connected to a second network, the second arbiter device communicating with a second communication interval synchronized with the first communication interval; and a wireless network architecture that desynchronizes the first communication interval and the second communication interval.
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公开(公告)号:US11870421B2
公开(公告)日:2024-01-09
申请号:US17076945
申请日:2020-10-22
发明人: Yuya Hiramatsu , Rei Goto , Yumi Torazawa
CPC分类号: H03H9/25 , H03H9/02559 , H03H9/02834 , H03H9/14541 , H03H9/6483 , H03H9/725
摘要: Aspects of this disclosure relate to a surface acoustic wave resonator. The surface acoustic wave resonator includes a piezoelectric substrate, interdigital transducer electrodes disposed on an upper surface of the piezoelectric substrate, a dielectric temperature compensation layer disposed on the piezoelectric substrate to cover the interdigital transducer electrodes, and a dielectric passivation layer over the temperature compensation layer. The passivation layer may include an oxide layer configured to have a sound velocity greater than that of the temperature compensation layer to suppress a transverse signal transmission.
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公开(公告)号:US20240007079A1
公开(公告)日:2024-01-04
申请号:US18214611
申请日:2023-06-27
发明人: Rei Goto , Hironori Fukuhara
CPC分类号: H03H9/02929 , H03H3/08 , H03H9/1085 , H03H9/25
摘要: A packaged acoustic wave component comprises a substrate having a trap-rich layer arranged at a surface of the substrate, a functional layer disposed over the surface of the substrate such as to cover that surface, a piezoelectric layer disposed over the functional layer and covering the functional layer with the exception of a peripheral portion of the functional layer, a first metal layer comprising an electrode structure disposed over the piezoelectric structure, and a second metal layer disposed partially in contact with the first metal layer and partially in contact with the peripheral portion of the functional layer.
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公开(公告)号:US20230421154A1
公开(公告)日:2023-12-28
申请号:US18141927
申请日:2023-05-01
发明人: Yu Zhu , Oleksiy Klimashov , Paul T. DiCarlo
IPC分类号: H03K17/693 , H01L29/93 , H03K17/16 , H04B1/44
CPC分类号: H03K17/693 , H01L29/93 , H03K17/161 , H04B1/44
摘要: Described herein are switches with asymmetrical anti-series varactor pairs to improve switching performance. The disclosed switches can include asymmetrical varactor pairs to reduce distortions. The asymmetry in the varactor pairs can be associated with geometry of each varactor in the pair. The disclosed switches can stack both symmetrical and asymmetrical varactor pairs. The disclosed switches with asymmetrical anti-series varactor pairs can be configured to improve both H2 and H3 simultaneously.
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公开(公告)号:US20230420332A1
公开(公告)日:2023-12-28
申请号:US18213200
申请日:2023-06-22
IPC分类号: H01L23/367 , H01L23/373
CPC分类号: H01L23/3677 , H01L23/373
摘要: An integrated device die is disclosed. The integrated device die can include a substrate having a first side and a second side opposite the first side, a heat generating electronic component disposed over the first side of the substrate, a dielectric layer disposed such that the heat generating electronic component is positioned at least partially between the substrate and the dielectric layer. A surface of the dielectric layer that faces away from the substrate includes a terminal that is electrically connected to the heat generating electronic component and is laterally offset from the heat generating electronic component. The thermally conductive structure is positioned between the substrate and the terminal. The substrate and the thermally conductive structure at least partially define a thermal pathway between the heat generating electronic component and the terminal.
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公开(公告)号:US20230402984A1
公开(公告)日:2023-12-14
申请号:US18197407
申请日:2023-05-15
发明人: Huanhui Zhan , Krishna Pentakota
CPC分类号: H03H7/0115 , H04B1/40 , H03B5/1212
摘要: An apparatus for communicating across an isolation barrier includes a differential pair of input terminals. The apparatus includes a bandpass filter circuit configured to receive a received signal on the differential pair of input terminals and to provide a received differential signal on a differential pair of nodes. The apparatus includes a demodulator directly coupled to the bandpass filter circuit and configured to directly demodulate the received differential signal on the differential pair of nodes to provide a demodulated received signal.
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公开(公告)号:US20230402338A1
公开(公告)日:2023-12-14
申请号:US18329186
申请日:2023-06-05
发明人: Anthony James LoBianco , Ki Wook Lee , Yi Liu
CPC分类号: H01L23/3121 , H01L23/49827 , H01L23/15 , H05K1/181 , H01L21/563 , H05K3/4038 , H05K2201/0305
摘要: An electronic package is provided. The electronic package includes a substrate configured to receive one or more electronic modules, a first electronic module mounted to a first side of the substrate, a first mold structure extending over at least part of the first side of the substrate; and a group of electrically conductive through-mold connections provided on the first side of the substrate. The first mold structure substantially encapsulates the group of through-mold connections. The group of through-mold connections is exposed through the first mold structure. The group of through-mold connections is configured to couple to a circuit board by a corresponding group of intermediate solder portions. The through-mold connections can have a melting point in excess of a melting point of the intermediate solder portion. Related electronic assemblies, electronic devices, and methods of manufacturing and/or mounting an electronic package are provided.
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公开(公告)号:US20230402294A1
公开(公告)日:2023-12-14
申请号:US18329387
申请日:2023-06-05
发明人: Anthony James LoBianco , Ki Wook Lee , Yi Liu
CPC分类号: H01L21/565 , H01L21/60 , H01L2021/6027 , H01L2021/6024
摘要: Methods are disclosed for mounting an electronic package to a circuit board are disclosed. The electronic package can be mounted to the circuit board by use of intermediate solder portions such that each intermediate solder portion couples a corresponding through-mold connection of the electronic package to the circuit board. The through-mold connections can have a melting point in excess of a melting point of the intermediate solder portions. Related electronic packages, electronic assemblies, electronic devices, and methods of manufacturing electronic packages are disclosed.
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99.
公开(公告)号:US11842947B2
公开(公告)日:2023-12-12
申请号:US17317737
申请日:2021-05-11
IPC分类号: H01L27/12 , H01L23/482 , H01L23/66 , H01L27/02 , H01L29/10 , H01L21/74 , H01L29/786 , H01L29/417 , H04B1/40 , H01L21/8234 , H01L21/8238
CPC分类号: H01L23/482 , H01L21/743 , H01L23/4824 , H01L23/4825 , H01L23/66 , H01L27/0203 , H01L27/0207 , H01L27/1203 , H01L29/1087 , H01L29/41733 , H01L29/78615 , H01L29/78654 , H04B1/40 , H01L21/82385 , H01L21/823456 , H01L2223/6677 , H01L2924/1421
摘要: The fabrication of field-effect transistor (FET) devices is described herein where the FET devices include one or more body contacts implemented between source, gate, drain (S/G/D) assemblies to improve the influence of a voltage applied at the body contact on the S/G/D assemblies. The FET devices can include source fingers and drain fingers interleaved with gate fingers. The source and drain fingers of a first S/G/D assembly can be electrically connected to the source and drain fingers of a second S/G/D assembly. The source fingers and the drain fingers can be arranged in alternating rows.
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公开(公告)号:US20230387957A1
公开(公告)日:2023-11-30
申请号:US18127598
申请日:2023-03-28
发明人: Andrew Martin KAY
CPC分类号: H04B1/40 , H01G4/30 , H01G2/065 , H01G4/232 , H01C1/148 , H01G4/012 , H01L2924/141 , H01L23/66
摘要: A packaged electrical device can include an electrical element and a plurality of terminals connected to the electrical element. The packaged electrical device can further include a body configured to support the electrical element and the plurality of terminals. The body can have a rectangular cuboid shape with a length, a width, and a height that is greater than the width. The body can include a base plane configured to allow surface mounting of the device.
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