公开(公告)号：US20240361822A1

公开(公告)日：2024-10-31

申请号：US18469175

申请日：2023-09-18

申请人： Hitachi, Ltd.

发明人： Masanori TAKADA ,  Akira YAMAMOTO

IPC分类号： G06F1/3234

CPC分类号： G06F1/3234

摘要： When receiving power requirement for power control and performing power control of a target device in accordance with the received power requirement, based on power consumption for a performance of each component of the target device and a device configuration of the target device, power saving level management information is created, which respectively defines the performance of each component at each power saving level associated with each of a plurality of divided power consumption ranges of the target device, and based on a power consumption upper limit value or the power saving level of the target device designated as the received power requirement, the power saving level management information is referred to and the performance of each component is set to a performance of the power saving level according to the power requirement, respectively.

公开(公告)号：US20240361819A1

公开(公告)日：2024-10-31

申请号：US18764379

申请日：2024-07-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Chen KUO ,  Yangsyu LIN ,  Yu-Hao HSU ,  Cheng Hung LEE ,  Hung-Jen LIAO

IPC分类号： G06F1/3206 ,  G06F1/3234

CPC分类号： G06F1/3206 ,  G06F1/3275

摘要： A circuit includes a power detector and a logic circuit. The power detector is configured to output a first power management signal according to a first power supply signal from a first power supply and a status signal. The circuit is configured to operate in different modes in response to the status signal. The logic circuit is configured to output a second power management signal, according to the first power management signal and the status signal.

公开(公告)号：US12131024B2

公开(公告)日：2024-10-29

申请号：US18204854

申请日：2023-06-01

申请人： Kioxia Corporation

发明人： Shinichi Kanno ,  Hiroshi Nishimura ,  Hideki Yoshida ,  Hiroshi Murayama

IPC分类号： G06F3/06 ,  G06F1/3234 ,  G06F11/10 ,  G06F12/02 ,  G11C16/04 ,  G11C16/24 ,  G11C29/52 ,  H03M13/29

CPC分类号： G06F3/0604 ,  G06F1/3275 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/1068 ,  G11C29/52 ,  H03M13/2906 ,  G06F12/0246 ,  G06F2212/214 ,  G11C16/0483 ,  G11C16/24 ,  Y02D10/00

摘要： A memory system including: a nonvolatile memory; first and second decoders configured to execute first and second error correction for correcting data read from the nonvolatile memory; and a controller configured to receive a first command issued by a host device, the first command being a command that requests neither reading nor writing data from or to the nonvolatile memory and that includes information indicative of acceptable latency of error correction, in response to receiving the first command, select one of the first decoder and the second decoder based on the received first command, and after receiving the first command, output data read from the nonvolatile memory through the selected one of the first decoder and the second decoder to the host device.

公开(公告)号：US12130964B2

公开(公告)日：2024-10-29

申请号：US18527350

申请日：2023-12-03

申请人： Sony Interactive Entertainment Inc.

发明人： Andrew Young ,  Jeffrey Roger Stafford

IPC分类号： G06F3/01 ,  G02B27/01 ,  G06F1/16 ,  G06F1/3234 ,  G06F3/03 ,  G06F3/147 ,  H04N19/124 ,  H04N19/167

CPC分类号： G06F3/013 ,  G02B27/017 ,  G06F1/163 ,  G06F1/1686 ,  G06F1/325 ,  G06F3/011 ,  G06F3/0304 ,  G06F3/147 ,  H04N19/124 ,  H04N19/167 ,  G02B2027/014 ,  G02B2027/0178 ,  G02B2027/0187 ,  G09G2310/04 ,  G09G2340/0428 ,  G09G2350/00

摘要： Gaze tracking data representing a user's gaze is analyzed to determine one or more regions of interest. One or more gaze tracking parameters are determined from the gaze tracking data. Adjusted foveation data is determined representing an adjusted size and/or shape of one or more regions of interest in one or more images to be subsequently presented to the user based on the one or more gaze tracking parameters. The compression of the one or more transmitted images is adjusted so that fewer bits are needed to transmit data for portions of an image outside the one or more regions of interest than for portions of the image within the one or more regions of interest. Adjusting compression includes eliminating the region(s) of interest from images that are presented to the user during the saccade or blink.

公开(公告)号：US12130689B2

公开(公告)日：2024-10-29

申请号：US18157549

申请日：2023-01-20

申请人： Microsoft Technology Licensing, LLC

发明人： Anatoly Tsvetov ,  Idan Wolf ,  Omer Kasher-Hitin ,  Oren Istrin

IPC分类号： G06F1/3234 ,  G06F3/041

CPC分类号： G06F1/3262 ,  G06F3/0412

摘要： Methods, systems and computer program products are provided for touch detection of computing device position. A touch filter monitor signals generated by one or more touch input devices for a signature of one or more other input devices proximate to the touch input device, which may indicate a user physically manipulated the computing device to render the input device(s) inoperable, such as by closing a portable computer. The touch filter controls the computing device to enter or remain in a power saving mode based on detection of one or more signatures of one or more other input devices in a signal generated by the monitored touch input device(s).

公开(公告)号：US20240345646A1

公开(公告)日：2024-10-17

申请号：US18643714

申请日：2024-04-23

申请人： Rambus Inc.

发明人： Dinesh Patil ,  Amir Amirkhany ,  Farrukh Aquil ,  Kambiz Kaviani ,  Frederick A. Ware

IPC分类号： G06F1/324 ,  G06F1/3234 ,  G06F1/3287 ,  G06F5/06 ,  G11C7/04 ,  G11C7/10 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4093 ,  H03L7/081

CPC分类号： G06F1/324 ,  G06F1/3275 ,  G06F1/3287 ,  G06F5/065 ,  G11C7/1057 ,  G11C7/1066 ,  G11C7/222 ,  G11C11/4076 ,  G11C11/4093 ,  G06F2205/067 ,  G11C7/04 ,  G11C2207/2272 ,  H03L7/0816

摘要： Embodiments generally relate to a memory device. In one embodiment, the memory device includes a clock receiver circuit that receives an external clock signal and provides an internal clock signal. The memory device also includes a delay-locked loop circuit (DLL) having an input, and a circuit that receives the internal clock signal. The circuit selects which pulses of the internal clock signal are applied to the input of the DLL, such that no more than two clock pulses selected from at least three consecutive pulses of the external clock signal are applied to the input of the DLL during a predetermined interval. In another embodiment, a method includes receiving an external clock signal at a clock receiver circuit, receiving an internal clock signal from the clock receiver circuit, and selecting which pulses of the internal clock signal are applied to an input of a DLL, where no more than two clock pulses selected from at least three consecutive pulses of the external clock signal are applied to the input of the DLL during a predetermined interval.

公开(公告)号：US12111716B2

公开(公告)日：2024-10-08

申请号：US18304849

申请日：2023-04-21

申请人： Advanced Micro Devices, Inc.

发明人： Mihir Shaileshbhai Doctor ,  Alexander J. Branover ,  Benjamin Tsien ,  Indrani Paul ,  Christopher T. Weaver ,  Thomas J. Gibney ,  Stephen V. Kosonocky ,  John P. Petry

IPC分类号： G06F1/32 ,  G06F1/3234 ,  G06F1/3287 ,  G06F1/3296

CPC分类号： G06F1/3287 ,  G06F1/3265 ,  G06F1/3278 ,  G06F1/3296

摘要： A processing device and method for efficient transitioning to and from a reduced power state is provided. The processing device comprises a plurality of components having assigned registers used to store data to execute a program and a power management controller, in communication with the plurality of components. The power management controller receives an indication that the plurality of components are idle, executes a process to enter a component into a reduced power state in response to receiving an acknowledgement from the component of a request from the power management controller to remove power to the component, and executes a process to exit the component from the reduced power state in response to the component being active.

公开(公告)号：US12111674B2

公开(公告)日：2024-10-08

申请号：US17720483

申请日：2022-04-14

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Choonghoon Park ,  Jong-Lae Park ,  Bumgyu Park ,  Youngtae Lee ,  Donghee Han

IPC分类号： G06F1/26 ,  G05F1/46 ,  G05F1/66 ,  G06F1/32 ,  G06F1/3234 ,  G06F1/3296 ,  G06F15/78

CPC分类号： G05F1/66 ,  G05F1/462 ,  G06F1/3243 ,  G06F1/3296 ,  G06F15/7807

摘要： An operating method of a system-on-chip (SoC) which includes a processor including a first core and a dynamic voltage and frequency scaling (DVFS) module and a clock management unit (CMU) for supplying an operating clock to the first core, the operating method including: obtaining a required performance of the first core; finding available frequencies meeting the required performance; obtaining information for calculating energy consumption for each of the available frequencies; calculating the energy consumption for each of the available frequencies, based on the information; determining a frequency, which causes minimum energy consumption, from among the available frequencies as an optimal frequency; and



adjusting an operating frequency to be supplied to the first core to the optimal frequency.

公开(公告)号：US12103546B2

公开(公告)日：2024-10-01

申请号：US17799407

申请日：2020-12-18

申请人： Hitachi Astemo, Ltd.

发明人： Tasuku Ishigooka ,  Nobuyasu Kanekawa ,  Tomohito Ebina ,  Kazuyoshi Serizawa ,  Tatsuya Horiguchi

IPC分类号： B60W50/035 ,  B60W60/00 ,  G06F1/32 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3287 ,  G06F15/78

CPC分类号： B60W50/035 ,  B60W60/001 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/3287 ,  G06F15/7814

摘要： Provided is a vehicle control device capable of executing control processing by utilizing a power saving execution determination unit that determines a shift to or a release from a normal mode to a power saving mode on the basis of a preset power saving condition, and a power saving execution unit that executes power saving control of the CPU by determining a shift to the power saving mode and stops the power saving control of the CPU by determining a release of the power saving mode. Then, the power saving execution determination unit has a plurality of power saving conditions, determines to shift to the power saving mode in a case where all of the plurality of power saving conditions are satisfied, and determines to release the power saving mode in the case of being changed to a state in which some of the power saving conditions are not satisfied.

公开(公告)号：US20240319777A1

公开(公告)日：2024-09-26

申请号：US18226437

申请日：2023-07-26

申请人： ASUSTEK COMPUTER INC.

发明人： Chih-Yao KUO ,  Ya-Han CHANG ,  Huang-Chieh HUANG

IPC分类号： G06F1/3234 ,  G06F1/20 ,  G06F1/3206 ,  H05K7/20

CPC分类号： G06F1/3234 ,  G06F1/203 ,  G06F1/206 ,  G06F1/3206 ,  H05K7/20136 ,  H05K7/20209

摘要： A heat dissipation control method applicable to a portable electronic device is provided. The portable electronic device is adapted to mount a heat dissipation back clip, and the heat dissipation back clip includes a cooling chip and a heat dissipation fan. The cooling chip has an adjustable cooling power consumption, and the heat dissipation fan has a heat removal wattage. The heat dissipation control method includes: detecting a real-time system power consumption of the portable electronic device; obtaining the cooling power consumption and the heat removal wattage; determining whether a sum of the real-time system power consumption and the cooling power consumption is greater than the heat removal wattage; and lowering the cooling power consumption if the sum is greater than the heat removal wattage. An electronic device and a portable electronic device to which the heat dissipation control method is applicable are further provided.