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公开(公告)号:US20240347598A1
公开(公告)日:2024-10-17
申请号:US18750589
申请日:2024-06-21
发明人: Lin-Yu Huang , Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Kuan-Lun Cheng , Chih-Hao Wang
IPC分类号: H01L29/08 , H01L23/528 , H01L29/06 , H01L29/78
CPC分类号: H01L29/0843 , H01L29/0649 , H01L29/785 , H01L23/528
摘要: A semiconductor structure includes a source/drain (S/D) feature; one or more channel semiconductor layers connected to the S/D feature; a gate structure engaging the one or more channel semiconductor layers; a first silicide feature at a frontside of the S/D feature; a second silicide feature at a backside of the S/D feature; and a dielectric liner layer at the backside of the S/D feature, below the second silicide feature, and spaced away from the second silicide feature by a first gap. A backside power rail is included.
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公开(公告)号:US12021119B2
公开(公告)日:2024-06-25
申请号:US18358576
申请日:2023-07-25
发明人: Lin-Yu Huang , Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Kuan-Lun Cheng , Chih-Hao Wang
IPC分类号: H01L29/08 , H01L23/528 , H01L29/06 , H01L29/78
CPC分类号: H01L29/0843 , H01L29/0649 , H01L29/785 , H01L23/528
摘要: A semiconductor structure includes a source/drain (S/D) feature; one or more channel semiconductor layers connected to the S/D feature; a gate structure engaging the one or more channel semiconductor layers; a first silicide feature at a frontside of the S/D feature; a second silicide feature at a backside of the S/D feature; and a dielectric liner layer at the backside of the S/D feature, below the second silicide feature, and spaced away from the second silicide feature by a first gap.
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公开(公告)号:US20240186179A1
公开(公告)日:2024-06-06
申请号:US18420209
申请日:2024-01-23
发明人: Li-Zhen Yu , Huan-Chieh Su , Lin-Yu Huang , Cheng-Chi Chuang , Chih-Hao Wang
IPC分类号: H01L21/768 , H01L21/02 , H01L23/528 , H01L23/532 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号: H01L21/7682 , H01L21/02603 , H01L21/76805 , H01L21/76895 , H01L23/5286 , H01L23/5329 , H01L29/0673 , H01L29/41733 , H01L29/42392 , H01L29/66545 , H01L29/66553 , H01L29/66636 , H01L29/66742 , H01L29/7848 , H01L29/78618 , H01L29/78696
摘要: Semiconductor devices including air spacers formed in a backside interconnect structure and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure; and a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including a first dielectric layer on the backside of the first transistor structure; a first via extending through the first dielectric layer, the first via being electrically coupled to a first source/drain region of the first transistor structure; a first conductive line electrically coupled to the first via; and an air spacer adjacent the first conductive line, the first conductive line defining a first side boundary of the air spacer.
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公开(公告)号:US11862559B2
公开(公告)日:2024-01-02
申请号:US17337962
申请日:2021-06-03
发明人: Lin-Yu Huang , Li-Zhen Yu , Cheng-Chi Chuang , Kuan-Lun Cheng , Chih-Hao Wang
IPC分类号: H01L23/528 , H01L29/40 , H01L29/417 , H01L29/78 , H01L27/092 , H01L27/088
CPC分类号: H01L23/5283 , H01L27/0886 , H01L27/0924 , H01L29/401 , H01L29/41775 , H01L29/41791 , H01L29/785 , H01L29/7851
摘要: A semiconductor structure includes a semiconductor substrate, a metallization feature over the semiconductor substrate, a first dielectric feature, a second dielectric feature, and a via contact. The metallization feature includes a first bottom corner and a second bottom corner opposite to the first bottom corner. The first dielectric feature is adjacent to the first bottom corner, and the second dielectric feature is adjacent to the second bottom corner. The metallization feature is interposed between the first dielectric feature and the second dielectric feature. In some embodiments, an included angle of the first bottom corner defined by a sidewall of first dielectric feature and a bottom surface of the metallization feature is less than 90°. The via contact is configured to connect the metallization feature to the semiconductor substrate.
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公开(公告)号:US20230238319A1
公开(公告)日:2023-07-27
申请号:US18195000
申请日:2023-04-03
发明人: Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Yu-Ming Lin , Chih-Hao Wang
IPC分类号: H01L23/522 , H01L27/088 , H01L21/8234 , H01L23/528 , H01L21/768
CPC分类号: H01L23/5226 , H01L21/76816 , H01L21/823418 , H01L21/823431 , H01L21/823468 , H01L21/823475 , H01L23/5283 , H01L27/0886
摘要: A semiconductor structure (MG) includes a metal gate structure disposed over a semiconductor substrate, a dielectric layer disposed adjacent to the MG, a source/drain (S/D) feature disposed adjacent to the dielectric layer, and a S/D contact disposed over the S/D feature. The S/D contact includes a first metal layer disposed over the S/D feature and a second metal layer disposed on the first metal layer.
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公开(公告)号:US11670581B2
公开(公告)日:2023-06-06
申请号:US17104760
申请日:2020-11-25
发明人: Lin-Yu Huang , Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Kuan-Lun Cheng , Chih-Hao Wang
IPC分类号: H01L23/522 , H01L29/417 , H01L21/768 , H01L23/532 , H01L29/40 , H01L23/528
CPC分类号: H01L23/5226 , H01L21/76816 , H01L21/76843 , H01L21/76897 , H01L23/5283 , H01L23/5286 , H01L23/53204 , H01L23/53209 , H01L29/401 , H01L29/41775 , H01L29/41791
摘要: A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a source/drain (S/D) feature formed in an interlayer dielectric layer (ILD), a S/D contact via electrically connected to the S/D feature, a metal feature formed over the S/D contact via, and a metal line formed over the metal feature and electrically connected to the S/D contact via. The metal line is formed of a material different from that of the S/D contact via, and the S/D contact via is spaced apart from the metal line. By providing the metal feature, electromigration between the metal line and the contact via may be advantageously reduced or substantially eliminated.
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公开(公告)号:US20230121408A1
公开(公告)日:2023-04-20
申请号:US18066071
申请日:2022-12-14
发明人: Li-Zhen Yu , Huan-Chieh Su , Lin-Yu Huang , Cheng-Chi Chuang , Chih-Hao Wang
IPC分类号: H01L21/768 , H01L21/02 , H01L23/535 , H01L29/786 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/66 , H01L23/532
摘要: A method includes forming a transistor over a substrate; forming a front-side interconnection structure over the transistor; after forming the front-side interconnection structure, removing the substrate; after removing the substrate, forming a backside via to be electrically connected to the transistor; depositing a dielectric layer to cover the backside via; forming an opening in the dielectric layer to expose the backside via; forming a spacer structure on a sidewall of the opening; after forming a spacer structure, forming a conductive feature in the opening to be electrically connected to the backside via; and after forming the conductive feature, forming an air gap in the spacer structure.
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公开(公告)号:US11621224B2
公开(公告)日:2023-04-04
申请号:US16583697
申请日:2019-09-26
发明人: Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Yu-Ming Lin , Chih-Hao Wang
IPC分类号: H01L23/522 , H01L27/088 , H01L21/8234 , H01L23/528 , H01L21/768
摘要: A semiconductor structure includes a metal gate structure (MG) disposed over a semiconductor substrate, gate spacers disposed on sidewalls of the MG, and a gate contact disposed on the MG. The semiconductor structure further includes an etch-stop layer (ESL) disposed on the gate spacers, and a source/drain (S/D) contact disposed adjacent to the gate spacers, where a top portion of the S/D contact defined by the ESL is narrower than a bottom portion of the S/D contact defined by the gate spacers.
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公开(公告)号:US11594602B2
公开(公告)日:2023-02-28
申请号:US16850267
申请日:2020-04-16
发明人: Li-Zhen Yu , Lin-Yu Huang , Cheng-Chi Chuang , Yu-Ming Lin , Chih-Hao Wang
IPC分类号: H01L29/417 , H01L29/49 , H01L29/78 , H01L29/66 , H01L21/285 , H01L21/321 , H01L21/8234 , H01L23/528 , H01L23/535
摘要: A semiconductor structure includes a metal gate structure (MG) formed over a substrate, a first gate spacer formed on a first sidewall of the MG, a second gate spacer formed on a second sidewall of the MG opposite to the first sidewall, where the second gate spacer is shorter than the first gate spacer, a source/drain (S/D) contact (MD) adjacent to the MG, where a sidewall of the MD is defined by the second gate spacer, and a contact feature configured to electrically connect the MG to the MD.
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公开(公告)号:US11508615B2
公开(公告)日:2022-11-22
申请号:US16943996
申请日:2020-07-30
发明人: Lin-Yu Huang , Li-Zhen Yu , Chia-Hao Chang , Cheng-Chi Chuang , Kuan-Lun Cheng , Chih-Hao Wang
IPC分类号: H01L21/768 , H01L23/532
摘要: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a conductive structure disposed over the device, and the conductive structure includes a sidewall having a first portion and a second portion. The semiconductor device structure further includes a first spacer layer including a third portion and a fourth portion, the third portion surrounds the first portion of the sidewall, and the fourth portion is disposed on the conductive structure. The semiconductor device structure further includes a first dielectric material surrounding the third portion, and an air gap is formed between the first dielectric material and the third portion of the first spacer layer. The first dielectric material includes a first material different than a second material of the first spacer layer, and the first dielectric material is substantially coplanar with the fourth portion of the first spacer layer.
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