公开(公告)号：US11303835B2

公开(公告)日：2022-04-12

申请号：US16996264

申请日：2020-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myunglae Chu ,  Sungyong Kim ,  Seoksan Kim ,  Minwoong Seo ,  Jaekyu Lee ,  Jongyeon Lee ,  Junan Lee

IPC: H04N5/3745 ,  H04N5/378

Abstract: Provided are a pixel array and an image sensor. The pixel array includes a plurality of pixels, which are arranged in a matrix form and which convert an optical signal into an electrical signal. The pixel array includes a first pixel arranged in a first row of the pixel array and a second pixel arranged in a second row of the pixel array, wherein each of the first pixel and the second pixel includes a first memory storing a digital reset value according to internal noise, the first memory of the first pixel stores m-bit data (where m is a natural number equal to or greater than 2), and the first memory of the second pixel stores n-bit data (where n is a natural number less than m).

公开(公告)号：US10972692B2

公开(公告)日：2021-04-06

申请号：US16599787

申请日：2019-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Woong Seo ,  Jaekyu Lee

IPC: H04N5/3745 ,  H04N5/378 ,  H04N5/351

Abstract: An image sensor includes a plurality of pixels. Each of the plurality of pixels includes a photodetector that includes a photoelectric conversion element that outputs a detection signal in response to light incident thereon, a comparator that compares the detection signal of the photodetector with a ramp signal and outputs a comparison signal in response thereto, a plurality of first memory cells that store a first counting value corresponding to a first voltage level of the detection signal using the comparison signal of the comparator and output the first counting value through a plurality of transmission lines, and a plurality of second memory cells that store a second counting value corresponding to a second voltage level of the detection signal using the comparison signal of the comparator and output the second counting value through the plurality of transmission lines.

公开(公告)号：US09538276B2

公开(公告)日：2017-01-03

申请号：US13975595

申请日：2013-08-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Garam Yu ,  Minwoo Oh ,  Byounghee Lee ,  Jaekyu Lee

IPC: H04R1/10 ,  H01R24/58 ,  H04M1/725 ,  H04M1/60

CPC classification number: H04R1/1041 ,  H01R24/58 ,  H04M1/6058 ,  H04M1/72527 ,  H04R2201/107 ,  H04R2420/05 ,  H04R2420/09

Abstract: An earphone connection interface, a terminal including the same, and a method of operating the terminal are provided. The earphone connection interface includes: a terminal left terminal, a terminal right terminal, a terminal ground terminal, an earphone detection terminal, and a terminal microphone terminal disposed sequentially along an inner wall of a cylindrical groove and an ear microphone bias voltage source electrically connected to the terminal microphone terminal; and a capacitor electrically connected to the terminal microphone terminal through a switch element.

Abstract translation: 提供耳机连接接口，包括其的终端以及操作终端的方法。 耳机连接接口包括：端子左端子，端子右端子，端子接地端子，耳机检测端子和沿着圆柱形槽的内壁顺序布置的端子麦克风端子和耳麦克风偏置电压源电连接 到终端话筒终端; 以及通过开关元件电连接到终端麦克风端子的电容器。

公开(公告)号：US20250071428A1

公开(公告)日：2025-02-27

申请号：US18782093

申请日：2024-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaekyu Lee

IPC: H04N23/73 ,  H01L27/146 ,  H04N25/531 ,  H04N25/532

Abstract: An image sensor pixel includes: first and second sub-pixels, which are electrically coupled to first and second floating diffusion nodes of the pixel, respectively; a first rolling shutter operation circuit configured to read out photocharges that are collected in the first floating diffusion node during a rolling shutter mode of operation; a second rolling shutter operation circuit configured to read out photocharges that are collected in the second floating diffusion node during the rolling shutter mode of operation; a global select switch circuit electrically coupled to the first and second rolling shutter operation circuits; and a global shutter operation circuit electrically coupled to the global select switch circuit. The global shutter operation circuit is configured to read out photocharges that are: (i) collected in the first and second floating diffusion nodes, and (ii) pass through the global select switch circuit during a global shutter mode of operation.

公开(公告)号：US09620190B2

公开(公告)日：2017-04-11

申请号：US14609977

申请日：2015-01-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaekyu Lee ,  Kiseok Suh

IPC: G11C11/16 ,  G11C13/00 ,  G11C13/02

CPC classification number: G11C11/165 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/003 ,  G11C13/025 ,  G11C2213/52 ,  G11C2213/79 ,  G11C2213/82

Abstract: A magnetic memory device can include a plurality of separately controllable magnetic memory segments configured to store data. A plurality of separately controllable source lines can each be coupled to a respective one of the plurality of separately controllable magnetic memory segments.

公开(公告)号：US09362225B2

公开(公告)日：2016-06-07

申请号：US14598228

申请日：2015-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungwoo Song ,  Jaekyu Lee

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/423 ,  H01L27/108 ,  H01L27/11 ,  H01L27/10 ,  H01L27/105 ,  H01L27/22 ,  H01L45/00 ,  H01L27/24 ,  H01L27/02

CPC classification number: H01L23/528 ,  H01L23/5226 ,  H01L27/0203 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L29/4236 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are data storage devices and methods of manufacturing the same. The device may include a plurality of cell selection parts formed in a substrate, a plate conductive pattern covering the cell selection parts and electrically connected to first terminals of the cell selection parts, a plurality of through-pillars penetrating the plate conductive pattern and insulated from the plate conductive pattern, and a plurality of data storage parts directly connected to the plurality of through-pillars, respectively. The data storage parts may be electrically connected to second terminals of the cell selection parts, respectively.

公开(公告)号：US08901009B2

公开(公告)日：2014-12-02

申请号：US14134008

申请日：2013-12-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaekyu Lee ,  Kiseok Suh ,  Tae Eung Yoon

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1691 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1641

Abstract: A memory device includes a lower interconnection in a semiconductor substrate, the lower interconnection being made of a material different from the semiconductor substrate, a selection element on the lower interconnection, and a memory element on the selection element.

Abstract translation: 存储器件包括半导体衬底中的下互连，下互连由不同于半导体衬底的材料制成，下互连上的选择元件以及选择元件上的存储元件。

公开(公告)号：US11792540B2

公开(公告)日：2023-10-17

申请号：US18145460

申请日：2022-12-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaekyu Lee ,  Heesung Shim

IPC: H04N25/531 ,  H01L27/146 ,  H04N25/75 ,  H04N25/76 ,  H04N25/533

CPC classification number: H04N25/531 ,  H01L27/14612 ,  H01L27/14643 ,  H04N25/75

Abstract: An image sensor is disclosed. The image sensor includes a plurality of pixels arranged in a plurality of rows and a plurality of columns, each of the pixels including: a photodiode; a floating diffusion node configured to accumulate photocharges generated from the photodiode; a first capacitor configured to store charges according to a voltage of the floating diffusion node which is reset; a second capacitor configured to store charges according to a voltage of the floating diffusion node in which the photocharges are accumulated; a first sampling transistor connected to a first output node and configured to sample charges to the first capacitor; a second sampling transistor connected to the first output node and configured to sample charges to the second capacitor; and at least one precharge select transistor connected to the first output node and configured to reset the first output node.

公开(公告)号：US20200092506A1

公开(公告)日：2020-03-19

申请号：US16394541

申请日：2019-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhan Park ,  Jaekyu Lee ,  Kijae Hur

IPC: H04N5/369 ,  H01L27/146 ,  H01L23/528 ,  G11C11/408 ,  H01L27/108 ,  H01L23/48 ,  G11C11/4074 ,  H01L25/18 ,  H04N5/378

Abstract: An image sensor in which a pixel array and a memory cell array are merged includes a first semiconductor chip including the pixel array and the memory cell array in a same semiconductor chip, and a second semiconductor chip overlapping the first semiconductor chip in a vertical direction. The second semiconductor chip includes a first logic circuit that controls the pixel array, an analog-to-digital converter (ADC) that converts an analog signal output from the pixel array under control of the first logic circuit to a digital signal, and a second logic circuit that stores data that is output from the ADC circuit based on the digital signal to the memory cell array of the first semiconductor chip.

公开(公告)号：US10141400B2

公开(公告)日：2018-11-27

申请号：US15343569

申请日：2016-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaekyu Lee

IPC: H01L29/06 ,  H01L27/088 ,  H01L27/092 ,  H01L29/423 ,  H01L21/28 ,  H01L29/66 ,  H01L21/8234

Abstract: A semiconductor device includes device isolation layer on a substrate to define an active region, a first gate electrode on the active region extending in a first direction parallel to a top surface of the substrate, a second gate electrode on the device isolation layer and spaced apart from the first gate electrode in the first direction, a gate spacer between the first gate electrode and the second gate electrode, and source/drain regions in the active region at opposite sides of the first gate electrode. The source/drain regions are spaced apart from each other in a second direction that is parallel to the top surface of the substrate and crossing the first direction, and, when viewed in a plan view, the first gate electrode is spaced apart from a boundary between the active region and the device isolation layer.