公开(公告)号：US20240194527A1

公开(公告)日：2024-06-13

申请号：US18197846

申请日：2023-05-16

Applicant: Applied Materials, Inc.

Inventor： Sahil Jaykumar PATEL ,  Xianyuan ZHAO ,  Wei LEI ,  Aixi ZHANG ,  Yi XU ,  Yu LEI

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76877 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/53266

Abstract: Methods and apparatus for processing a substrate are provided. In some embodiments, a method includes depositing an amorphous interlayer atop a first layer on a substrate, wherein the first layer is a metal-containing layer, and depositing a metal layer atop the amorphous interlayer.

公开(公告)号：US20230343643A1

公开(公告)日：2023-10-26

申请号：US17868475

申请日：2022-07-19

Applicant: Applied Materials, Inc.

Inventor： Chih-Hsun HSU ,  Shiyu YUE ,  Wei LEI ,  Yi XU ,  Jiang LU ,  Yu LEI ,  Ziye XIONG ,  Tsung-Han YANG ,  Zhimin QI ,  Aixi ZHANG ,  Jie ZHANG ,  Liqi WU ,  Rongjun WANG ,  Shihchung CHEN ,  Meng-Shan WU ,  Chun-Chieh WANG ,  Annamalai LAKSHMANAN ,  Yixiong YANG ,  Xianmin TANG

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76877 ,  H01L21/76876 ,  H01L21/76843 ,  H01L21/76865 ,  H01L23/5226 ,  H01L21/76826

Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.

公开(公告)号：US20230326791A1

公开(公告)日：2023-10-12

申请号：US17718242

申请日：2022-04-11

Applicant: Applied Materials, Inc.

Inventor： Zhimin QI ,  Yi XU ,  Shirish A. PETHE ,  Xingyao GAO ,  Shiyu YUE ,  Aixi ZHANG ,  Wei LEI ,  Yu LEI ,  Geraldine VASQUEZ ,  Dien-yeh WU ,  Da HE

IPC: H01L21/768 ,  H01L21/285 ,  C23C14/18 ,  C23C16/14

CPC classification number: H01L21/76879 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/28568 ,  C23C14/18 ,  C23C16/14

Abstract: Embodiments of methods and associated apparatus for filling a feature in a substrate are provided herein. In some embodiments, a method of depositing tungsten in features of a substrate includes: depositing a seed layer consisting essentially of tungsten in the features via a physical vapor deposition (PVD) process; and depositing a bulk layer consisting essentially of tungsten in the features via a chemical vapor deposition (CVD) process to fill the features such that the deposition of the bulk layer is selective to within the features as compared to a field region of the substrate, wherein the CVD process is performed by flowing hydrogen gas (H2) at a first flow rate and a tungsten precursor at a second flow rate, and wherein the first flow rate is less than the second flow rate.

公开(公告)号：US20230098561A1

公开(公告)日：2023-03-30

申请号：US17489089

申请日：2021-09-29

Applicant: Applied Materials, Inc.

Inventor： Jiajie CEN ,  Da HE ,  Yi XU ,  Yu LEI

IPC: H01L21/768 ,  H01L21/02

Abstract: A method of gap filling a feature on a substrate decreases the feature-to-feature gap fill height variation by using a tungsten halide soak treatment. In some embodiments, the method may include heating a substrate to a temperature of approximately 350 degrees Celsius to approximately 450 degrees Celsius, exposing the substrate to a tungsten halide gas at a process pressure of approximately 5 Torr to approximately 25 Torr, soaking the substrate for a soak time of approximately 5 seconds to approximately 60 seconds with the tungsten halide gas, and performing a metal preclean process and a gap fill deposition on a plurality of features on the substrate after soaking of the substrate has completed.

公开(公告)号：US20220181201A1

公开(公告)日：2022-06-09

申请号：US17110826

申请日：2020-12-03

Applicant: Applied Materials, Inc.

Inventor： Yi XU ,  Yufei HU ,  He REN ,  Yu LEI ,  Shi YOU ,  Kazuya DAITO

IPC: H01L21/768

Abstract: Embodiments of the disclosure provide methods which reduce or eliminate lateral growth of a selective tungsten layer. Further embodiments provide an integrated clean and deposition method which improves the selectivity of selectively deposited tungsten on trench structures. Additional embodiments provide methods for forming a more uniform and selective bottom-up gap fill for trench structures with improved film properties.

公开(公告)号：US20200303250A1

公开(公告)日：2020-09-24

申请号：US16803842

申请日：2020-02-27

Applicant: Applied Materials, Inc.

Inventor： Xi CEN ,  Feiyue MA ,  Kai WU ,  Yu LEI ,  Kazuya DAITO ,  Yi XU ,  Vikash BANTHIA ,  Mei CHANG ,  He REN ,  Raymond Hoiman HUNG ,  Yakuan YAO ,  Avgerinos V. GELATOS ,  David T. OR ,  Jing ZHOU ,  Guoqiang JIAN ,  Chi-Chou LIN ,  Yiming LAI ,  Jia YE ,  Jenn-Yue WANG

IPC: H01L21/768 ,  H01L21/3213 ,  H01L21/02

Abstract: The present disclosure generally relates to methods for processing of substrates, and more particularly relates to methods for forming a metal gapfill. In one implementation, the method includes forming a metal gapfill in an opening using a multi-step process. The multi-step process includes forming a first portion of the metal gapfill, performing a sputter process to form one or more layers on one or more side walls, and growing a second portion of the metal gapfill to fill the opening with the metal gapfill. The metal gapfill formed by the multi-step process is seamless, and the one or more layers formed on the one or more side walls seal any gaps or defects between the metal gapfill and the side walls. As a result, fluids utilized in subsequent processes do not diffuse through the metal gapfill.

公开(公告)号：US20240087955A1

公开(公告)日：2024-03-14

申请号：US18241343

申请日：2023-09-01

Applicant: Applied Materials, Inc.

Inventor： Yi XU ,  Xianyuan ZHAO ,  Zhimin QI ,  Aixi ZHANG ,  Geraldine VASQUEZ ,  Dien-Yeh WU ,  Wei LEI ,  Xingyao GAO ,  Shirish PETHE ,  Wenting HOU ,  Chao DU ,  Tsung-Han YANG ,  Kyoung-Ho BU ,  Chen-Han LIN ,  Jallepally RAVI ,  Yu LEI ,  Rongjun WANG ,  Xianmin TANG

IPC: H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76876

Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.

公开(公告)号：US20240018648A1

公开(公告)日：2024-01-18

申请号：US18220408

申请日：2023-07-11

Applicant: Applied Materials, Inc.

Inventor： Geraldine VASQUEZ ,  Yi XU ,  Dien-yeh WU ,  Aixi ZHANG ,  Jallepally RAVI ,  Yu LEI

IPC: C23C16/44 ,  H01J37/32 ,  C23C16/458

CPC classification number: C23C16/4408 ,  H01J37/32798 ,  C23C16/4586 ,  H01J2237/3321

Abstract: Embodiments of a purge ring for use in a process chamber are provided herein. In some embodiments, a purge ring includes: an annular body having an inner portion and an outer portion, wherein the inner portion includes an inner surface of the annular body, the inner surface comprising a first inner sidewall, a second inner sidewall, and a third inner sidewall, wherein the inner portion has an upper inner notch that defines the first inner sidewall and a lower inner notch that defines the second inner sidewall, wherein a third inner sidewall is disposed between the first inner sidewall and the second inner sidewall, and wherein the first inner sidewall and the second inner sidewall are disposed radially outward of the third inner sidewall.

公开(公告)号：US20250006518A1

公开(公告)日：2025-01-02

申请号：US18753006

申请日：2024-06-25

Applicant: Applied Materials, Inc.

Inventor： Shiyu YUE ,  Wei LEI ,  Yu LEI ,  Ju Hyun OH ,  Zhimin QI ,  Sahil Jaykumar PATEL ,  Yi XU ,  Aixi ZHANG ,  Bingqian LIU ,  Cong TRINH ,  Xianmin TANG ,  Hayrensa ABLAT

IPC: H01L21/67 ,  H01L21/321 ,  H01L21/768 ,  H01L23/532

Abstract: Embodiments herein relate to a method, semiconductor device structures, and multi-chamber processing system for exposing a semiconductor device structure to an oxidizing plasma to form an oxide layer on at least one electrical connection formed in at least one feature formed within a dielectric layer of the semiconductor device structure, performing an etch process to remove the oxide layer and form an etch recess between a portion of the electrical connection and the dielectric layer At least a portion of the etch recess extends underneath at least a portion of the dielectric layer, and filling the at least one feature and the etch recess with a metal material.

公开(公告)号：US20240355673A1

公开(公告)日：2024-10-24

申请号：US18136970

申请日：2023-04-20

Applicant: Applied Materials, Inc.

Inventor： Wei LEI ,  Sahil PATEL ,  Yixiong YANG ,  Yu LEI ,  Shiyu YUE ,  Yi XU ,  Tuerxun AILIHUMAER ,  Juhyun OH ,  Xianmin TANG ,  Rongjun WANG

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53266 ,  C23C14/18 ,  H01L21/02063 ,  H01L21/28568

Abstract: Semiconductor devices and methods for molybdenum fill in semiconductor devices are provided. In one aspect, a method for processing a semiconductor device substrate is provided. The method includes exposing at least one feature formed in a dielectric layer to a grain modification layer deposition process to deposit a grain modification layer over at least a portion of the at least one feature. The at least one feature is defined by sidewall surfaces formed in the dielectric layer and a bottom surface extending between the sidewall surfaces. The method further includes exposing the at least one feature to a molybdenum deposition process to form a molybdenum-fill layer on the grain modification layer, wherein the grain modification layer comprises a metal different from molybdenum.