公开(公告)号：US09911593B2

公开(公告)日：2018-03-06

申请号：US15244875

申请日：2016-08-23

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Erhu Zheng ,  Shiliang Ji ,  Yiying Zhang

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/28 ,  H01L27/11524 ,  H01L27/11529 ,  H01L29/788 ,  H01L21/762 ,  H01L27/11521 ,  H01L27/11531 ,  H01L29/768 ,  H01L27/115 ,  H01L29/66

CPC分类号： H01L21/02285 ,  H01L21/02118 ,  H01L21/02343 ,  H01L21/02356 ,  H01L21/28273 ,  H01L21/31051 ,  H01L21/31053 ,  H01L21/76224 ,  H01L21/76801 ,  H01L21/76822 ,  H01L21/76826 ,  H01L21/76837 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11531 ,  H01L29/665 ,  H01L29/66825 ,  H01L29/7887

摘要： A method for fabricating an NAND flash memory includes providing a semiconductor substrate with a core region and a peripheral region, forming a plurality of discrete gate stack structures in the core region with neighboring gate stack structures separated by a first dielectric layer. The method further includes forming a flowable dielectric layer on the first dielectric layer and the gate stack structures, and forming a solid dielectric layer through a solidification treatment process performed on the flowable dielectric layer. Voids and seams formed in the top portion of the first dielectric layer are filled by the solid dielectric layer. The method also includes removing the solid dielectric layer and a portion of the first dielectric layer to expose a top portion of the gate stack structures, and forming a metal silicide layer on each gate stack structure.

公开(公告)号：US09748441B2

公开(公告)日：2017-08-29

申请号：US15070684

申请日：2016-03-15

申请人： Oji Holdings Corporation

发明人： Yoshihisa Hatta ,  Kei Shinotsuka ,  Kotaro Dai ,  Yasuhito Kajita

IPC分类号： H01L33/20 ,  H01L21/02 ,  H01L33/00 ,  H01L33/50 ,  H01L21/308

CPC分类号： H01L33/20 ,  H01L21/02019 ,  H01L21/02282 ,  H01L21/02285 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3081 ,  H01L21/3086 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/50 ,  H01L2933/0025

摘要： A method of manufacturing a semiconductor light emitting device, including arranging a plurality of particles in a monolayer on a substrate, dry etching the plurality of particles arranged to provide a void between the particles in a condition IN which the particles are etched while the substrate is not substantially etched; and dry etching the substrate using the plurality of particles after the particle etching step as an etching mask, thereby forming an uneven structure on one surface of the substrate.

公开(公告)号：US20170170011A1

公开(公告)日：2017-06-15

申请号：US15244875

申请日：2016-08-23

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： ERHU ZHENG ,  SHILIANG JI ,  YIYING ZHANG

IPC分类号： H01L21/02 ,  H01L29/788 ,  H01L21/3105 ,  H01L27/115 ,  H01L21/28

CPC分类号： H01L21/02285 ,  H01L21/02118 ,  H01L21/02343 ,  H01L21/02356 ,  H01L21/28273 ,  H01L21/31051 ,  H01L21/31053 ,  H01L21/76224 ,  H01L21/76801 ,  H01L21/76822 ,  H01L21/76826 ,  H01L21/76837 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11531 ,  H01L29/665 ,  H01L29/66825 ,  H01L29/7887

摘要： A method for fabricating an NAND flash memory includes providing a semiconductor substrate with a core region and a peripheral region, forming a plurality of discrete gate stack structures in the core region with neighboring gate stack structures separated by a first dielectric layer. The method further includes forming a flowable dielectric layer on the first dielectric layer and the gate stack structures, and forming a solid dielectric layer through a solidification treatment process performed on the flowable dielectric layer. Voids and seams formed in the top portion of the first dielectric layer are filled by the solid dielectric layer. The method also includes removing the solid dielectric layer and a portion of the first dielectric layer to expose a top portion of the gate stack structures, and forming a metal silicide layer on each gate stack structure.

公开(公告)号：US09492841B2

公开(公告)日：2016-11-15

申请号：US13847457

申请日：2013-03-19

申请人： IMEC ,  St. Petersburg Electrotechnical University

发明人： Victor Luchinin ,  Svetlana Goloudina ,  Vyacheslav Pasyuta ,  Alexey Ivanov ,  Mikhail Baklanov ,  Mikhail Krishtab

IPC分类号： B05D1/20 ,  B32B37/15 ,  B32B18/00 ,  B32B27/04 ,  B32B27/28 ,  H05K1/03 ,  H01L21/02 ,  H05K3/14 ,  C09D179/08 ,  C08G73/10

CPC分类号： B32B37/15 ,  B05D1/20 ,  B05D1/208 ,  B32B18/00 ,  B32B27/04 ,  B32B27/281 ,  B32B2260/046 ,  B32B2305/026 ,  B32B2305/07 ,  B32B2307/00 ,  B32B2307/204 ,  B32B2379/08 ,  B32B2457/00 ,  C08G73/1067 ,  C09D179/08 ,  H01L21/02285 ,  H01L21/02318 ,  H05K1/03 ,  H05K3/143 ,  H05K2201/01 ,  H05K2201/0104 ,  H05K2201/0116 ,  H05K2201/0154 ,  H05K2201/0162 ,  Y10T428/249979 ,  Y10T428/249991 ,  C08K5/175

摘要： Method for pore sealing a porous substrate, comprising: forming a continuous monolayer of a polyimide precursor on a liquid surface, transferring said polyimide precursor monolayer onto the porous substrate with the Langmuir-Blodgett technique, and imidization of the transferred polyimide precursor monolayers, thereby forming a polyimide sealing layer on the porous substrate. Porous substrate having at least one surface on which a sealing layer is provided to seal pores of the substrate, wherein the sealing layer is a polyimide having a thickness of a few monolayers and wherein there is no penetration of the polyimide into the pores.

摘要翻译： 用于孔密封多孔基材的方法，包括：在液体表面上形成聚酰亚胺前体的连续单层，使用Langmuir-Blodgett技术将所述聚酰亚胺前体单层转移到多孔基材上，并将转移的聚酰亚胺前体单层酰亚胺化，从而形成 多孔基材上的聚酰亚胺密封层。 具有至少一个表面的多孔基材，其上设有密封层以密封基材的孔，其中密封层是具有几个单层厚度的聚酰亚胺，并且其中聚酰亚胺不渗透到孔中。

公开(公告)号：US20160197236A1

公开(公告)日：2016-07-07

申请号：US15070684

申请日：2016-03-15

申请人： Oji Holdings Corporation

发明人： Yoshihisa HATTA ,  Kei SHINOTSUKA ,  Kotaro DAI ,  Yasuhito KAJITA

IPC分类号： H01L33/20

CPC分类号： H01L33/20 ,  H01L21/02019 ,  H01L21/02282 ,  H01L21/02285 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02521 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3081 ,  H01L21/3086 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/50 ,  H01L2933/0025

摘要： A method of manufacturing a semiconductor light emitting device, including arranging a plurality of particles in a monolayer on a substrate, dry etching the plurality of particles arranged to provide a void between the particles in a condition IN which the particles are etched while the substrate is not substantially etched; and dry etching the substrate using the plurality of particles after the particle etching step as an etching mask, thereby forming an uneven structure on one surface of the substrate.

摘要翻译： 一种制造半导体发光器件的方法，包括在衬底上以单层布置多个颗粒，干燥蚀刻多个颗粒，所述颗粒被布置成在衬底为基底时蚀刻颗粒的状态IN中提供空隙， 基本没有蚀刻; 并且在颗粒蚀刻步骤之后使用多个颗粒干蚀刻基板作为蚀刻掩模，从而在基板的一个表面上形成不均匀的结构。

公开(公告)号：US09082551B2

公开(公告)日：2015-07-14

申请号：US14118354

申请日：2012-05-18

申请人： Minoru Osada ,  Yasuo Ebina ,  Takayoshi Sasaki

发明人： Minoru Osada ,  Yasuo Ebina ,  Takayoshi Sasaki

IPC分类号： H01G4/10 ,  H01L49/02 ,  B82Y30/00 ,  H01L21/02 ,  B32B18/00 ,  C04B35/495 ,  C04B35/626 ,  C01G33/00 ,  H01L21/8234 ,  H01L27/08

CPC分类号： H01G4/10 ,  B32B18/00 ,  B82Y30/00 ,  C01G33/006 ,  C01G35/006 ,  C01P2002/34 ,  C01P2004/24 ,  C01P2006/40 ,  C04B35/495 ,  C04B35/62685 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/768 ,  C04B2237/34 ,  C04B2237/345 ,  C04B2237/704 ,  H01L21/02197 ,  H01L21/02285 ,  H01L21/823462 ,  H01L27/0805 ,  H01L28/56 ,  Y10T156/10

摘要： A high dielectric nanosheet laminate is produced by laminating nanosheets, each of which has a thickness of 10 nm or less and is formed of an oxide that has a perovskite structure wherein at least four NbO6 octahedrons, TaO6 octahedrons or TiO6 octahedrons are included in a unit lattice. Consequently, the high dielectric nanosheet laminate is capable of achieving a high dielectric constant and a satisfactory insulation property, which are preferable for high dielectric nanosheet multilayer capacitors or the like, at the same time even if formed very thin.

摘要翻译： 高介电纳米片层叠体通过层压纳米片而制成，每个纳米片的厚度为10nm以下，由具有钙钛矿结构的氧化物形成，其中至少四个NbO 6八面体，TaO 6八面体或TiO 6八面体包含在单元中 格子。 因此，高电介质纳米片层叠体即使形成得非常薄，也能够实现高介电常数和令人满意的绝缘性，这对于高介电纳米片多层电容器等是优选的。

公开(公告)号：US20140150966A1

公开(公告)日：2014-06-05

申请号：US14118354

申请日：2012-05-18

申请人： Minoru Osada ,  Yasuo Ebina ,  Takayoshi Sasaki

发明人： Minoru Osada ,  Yasuo Ebina ,  Takayoshi Sasaki

IPC分类号： H01G4/10

CPC分类号： H01G4/10 ,  B32B18/00 ,  B82Y30/00 ,  C01G33/006 ,  C01G35/006 ,  C01P2002/34 ,  C01P2004/24 ,  C01P2006/40 ,  C04B35/495 ,  C04B35/62685 ,  C04B2235/3201 ,  C04B2235/3208 ,  C04B2235/768 ,  C04B2237/34 ,  C04B2237/345 ,  C04B2237/704 ,  H01L21/02197 ,  H01L21/02285 ,  H01L21/823462 ,  H01L27/0805 ,  H01L28/56 ,  Y10T156/10

摘要： A high dielectric nanosheet laminate is produced by laminating nanosheets, each of which has a thickness of 10 nm or less and is formed of an oxide that has a perovskite structure wherein at least four NbO6 octahedrons, TaO6 octahedrons or TiO6 octahedrons are included in a unit lattice. Consequently, the high dielectric nanosheet laminate is capable of achieving a high dielectric constant and a satisfactory insulation property, which are preferable for high dielectric nanosheet multilayer capacitors or the like, at the same time even if formed very thin.

摘要翻译： 高介电纳米片层叠体通过层压纳米片而制成，每个纳米片的厚度为10nm以下，由具有钙钛矿结构的氧化物形成，其中至少四个NbO 6八面体，TaO 6八面体或TiO 6八面体包含在单元中 格子。 因此，高电介质纳米片层叠体即使形成得非常薄，也能够实现高介电常数和令人满意的绝缘性，这对于高介电纳米片多层电容器等是优选的。

公开(公告)号：US20130200444A1

公开(公告)日：2013-08-08

申请号：US13583121

申请日：2012-03-22

申请人： Wei Wang ,  Jing Wang ,  Mei Zhao ,  Renrong Liang

发明人： Wei Wang ,  Jing Wang ,  Mei Zhao ,  Renrong Liang

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/47 ,  H01L21/02115 ,  H01L21/02285 ,  H01L29/401 ,  H01L29/66636 ,  H01L29/66643 ,  H01L29/7839

摘要： A Schottky barrier field effect transistor with a carbon-containing insulation layer and a method for fabricating the same are provided. The Schottky barrier field effect transistor comprises: a substrate; a gate stack formed on the substrate; a metal source and a metal drain formed in the substrate on both sides of the gate stack respectively; and the carbon-containing insulation layer formed between the substrate and the metal source and between the substrate and the metal drain respectively, in which a material of the carbon-containing insulation layer is organic molecular chains containing an alkyl group.

摘要翻译： 提供了具有含碳绝缘层的肖特基势垒场效应晶体管及其制造方法。 肖特基势垒场效应晶体管包括：衬底; 形成在所述基板上的栅极堆叠; 金属源和金属漏极分别形成在栅极堆叠两侧的基板中; 以及分别形成在基板和金属源之间以及基板和金属排出口之间的含碳绝缘层，其中含碳绝缘层的材料是含有烷基的有机分子链。

公开(公告)号：US06649424B2

公开(公告)日：2003-11-18

申请号：US10154340

申请日：2002-05-23

申请人： Manfred Mört ,  Walter Hartner ,  Volker Weinrich ,  Günther Schindler

发明人： Manfred Mört ,  Walter Hartner ,  Volker Weinrich ,  Günther Schindler

IPC分类号： H01L2100

CPC分类号： H01L28/55 ,  H01L21/02197 ,  H01L21/02282 ,  H01L21/02285 ,  H01L21/31691

摘要： A method of fabricating semiconductor circuits having integrated capacitors that have a dielectric or a ferroelectric material between electrodes. The materials are subjected to heat treatment at high temperatures in an oxygen atmosphere for the purpose of crystallization. The dielectric or ferroelectric is heated separately from the semiconductor substrate, is comminuted into small particles and only afterward applied in this form to the semiconductor substrate. This makes it possible to integrate substances with arbitrarily high crystallization temperature without damaging the integrated semiconductor circuit, since the semiconductor substrate itself does not have to be heated. Diffusion barriers for oxygen are unnecessary. Previous limitations on the capacitor capacitance are obviated owing to the free choice of dielectric or ferroelectric made possible, and the packing density of the capacitors is increased.

公开(公告)号：US20170021604A1

公开(公告)日：2017-01-26

申请号：US15285445

申请日：2016-10-04

申请人： IMEC ,  St. Petersburg Electrotechnical University

发明人： Victor Luchinin ,  Svetlana Goloudina ,  Vyacheslav Pasyuta ,  Alexey Ivanov ,  Mikhail Baklanov ,  Mikhail Krishtab

IPC分类号： B32B37/15 ,  B05D1/20 ,  B32B27/28

CPC分类号： C08J5/18 ,  B05D1/20 ,  B05D1/204 ,  B05D1/208 ,  B05D2505/50 ,  B32B18/00 ,  B32B27/04 ,  B32B27/281 ,  B32B37/15 ,  B32B2260/046 ,  B32B2305/026 ,  B32B2305/07 ,  B32B2307/00 ,  B32B2307/204 ,  B32B2379/08 ,  B32B2457/00 ,  B82Y30/00 ,  B82Y40/00 ,  C08G73/1067 ,  C08J2379/08 ,  C08J2483/02 ,  C09D179/08 ,  H01L21/02285 ,  H01L21/02318 ,  H01L23/5329 ,  H05K1/03 ,  H05K3/143 ,  H05K2201/01 ,  H05K2201/0104 ,  H05K2201/0116 ,  H05K2201/0154 ,  H05K2201/0162 ,  Y10T428/249979 ,  Y10T428/249991 ,  C08K5/175

摘要： Method for pore sealing a porous substrate, comprising: forming a continuous monolayer of a polyimide precursor on a liquid surface, transferring said polyimide precursor monolayer onto the porous substrate with the Langmuir-Blodgett technique, and imidization of the transferred polyimide precursor monolayers, thereby forming a polyimide sealing layer on the porous substrate. Porous substrate having at least one surface on which a sealing layer is provided to seal pores of the substrate, wherein the sealing layer is a polyimide having a thickness of a few monolayers and wherein there is no penetration of the polyimide into the pores.

摘要翻译： 用于孔密封多孔基材的方法，包括：在液体表面上形成聚酰亚胺前体的连续单层，使用Langmuir-Blodgett技术将所述聚酰亚胺前体单层转移到多孔基材上，并将转移的聚酰亚胺前体单层酰亚胺化，从而形成 多孔基材上的聚酰亚胺密封层。 具有至少一个表面的多孔基材，其上设有密封层以密封基材的孔，其中密封层是具有几个单层厚度的聚酰亚胺，并且其中聚酰亚胺不渗透到孔中。