公开(公告)号：US20240187110A1

公开(公告)日：2024-06-06

申请号：US18419461

申请日：2024-01-22

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/80 ,  G02B6/42 ,  G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/516

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US11916602B2

公开(公告)日：2024-02-27

申请号：US17175677

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/00 ,  H04B10/80 ,  H04B10/516 ,  G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  G02B6/42 ,  G11C5/14 ,  H04J14/00

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US11705972B2

公开(公告)日：2023-07-18

申请号：US17583967

申请日：2022-01-25

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/80 ,  H04B10/516 ,  G02B6/42

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20160020579A1

公开(公告)日：2016-01-21

申请号：US14545587

申请日：2015-05-26

申请人： The Board of Trustees of The University of Illinois

发明人： Milton Feng ,  Nick Holonyak, JR. ,  Mong-Kai Wu

IPC分类号： H01S5/062 ,  H01S5/34 ,  H01L29/417 ,  G11C7/10 ,  H01L29/08 ,  H01S5/10 ,  G11C13/04

CPC分类号： H01S5/06203 ,  G11C7/005 ,  G11C7/10 ,  G11C11/42 ,  G11C13/04 ,  G11C13/047 ,  H01L29/0692 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/41708 ,  H01L29/7371 ,  H01L33/0016 ,  H01L33/105 ,  H01S5/1071 ,  H01S5/2027 ,  H01S5/34

摘要： A ring cavity light-emitting transistor device, including: a planar semiconductor structure of a semiconductor base layer of a first conductivity type between semiconductor collector and emitter layers of a second conductivity type; base, collector, and emitter metalizations respectively coupled with the base layer, said collector layer, and said emitter layer, the base metalization including at least one annular ring coupled with a surface of the base layer; and an annular ring-shaped optical resonator in a region of the semiconductor structure generally including the interface of the base and emitter regions; whereby application of electrical signals with respect to the base, collector, and emitter metalizations causes light emission in the base layer that propagates in the ring-shaped optical resonator cavity.

公开(公告)号：US07941056B2

公开(公告)日：2011-05-10

申请号：US09941557

申请日：2001-08-30

申请人： Russel J. Baker ,  Brent Keeth

发明人： Russel J. Baker ,  Brent Keeth

IPC分类号： H04B10/00

CPC分类号： G11C11/4093 ,  G06F13/16 ,  G06F13/1668 ,  G06F13/287 ,  G06F13/4234 ,  G11C11/42 ,  H04B10/802 ,  H04L12/40013 ,  H04Q11/0071 ,  Y02D10/14 ,  Y02D10/151

摘要： A optical link for achieving electrical isolation between a controller and a memory device is disclosed. The optical link increases the noise immunity of electrical interconnections, and allows the memory device to be placed a greater distance from the processor than is conventional without power-consuming I/O buffers.

摘要翻译： 公开了一种用于实现控制器和存储器件之间的电气隔离的光学链路。 光链路增加了电互连的抗噪声能力，并且允许存储器件被放置在距离处理器更远的位置，而不需要耗电的I / O缓冲器。

公开(公告)号：US07406021B2

公开(公告)日：2008-07-29

申请号：US10986879

申请日：2004-11-15

申请人： Serguei Magnitski ,  Andrei Tarasishin ,  Eugene Levich ,  Jacob Malkin ,  Tatiana Lissovskaya ,  Iossif Diskin ,  Zeev Orbach ,  Boris Chernobrod

发明人： Serguei Magnitski ,  Andrei Tarasishin ,  Eugene Levich ,  Jacob Malkin ,  Tatiana Lissovskaya ,  Iossif Diskin ,  Zeev Orbach ,  Boris Chernobrod

IPC分类号： G11B9/00

CPC分类号： G11C13/047 ,  G11B7/08511 ,  G11B7/24012 ,  G11B7/24038 ,  G11B7/245 ,  G11B7/246 ,  G11B7/2467 ,  G11B7/2472 ,  G11B7/2533 ,  G11B2007/24612 ,  G11B2007/24624 ,  G11C11/42 ,  G11C13/04 ,  Y10T428/24479

摘要： An optical information storage medium has multiple information layers. On each layer, information is stored in the form of an electroluminescent material. The pits are organized into regions called pages. A specific page on a specific layer can be addressed through electrodes integrated into the medium. The medium can be read-only or WORM. For the WORM embodiment, a recordable electroluminescent material is combined with a quencher and a free radical generating compound that, when thermally degraded, generates free radicals to bleach the quencher. To amplify the light from an information layer, a photoconductive layer and an additional electroluminescent layer can be provided.

摘要翻译： 光信息存储介质具有多个信息层。 在每个层上，以电致发光材料的形式存储信息。 这些坑被组织成称为页面的区域。 可以通过集成到介质中的电极来寻址特定层上的特定页面。 介质可以是只读或WORM。 对于WORM实施例，可记录的电致发光材料与猝灭剂和产生自由基的化合物组合，当热降解时，其产生自由基以漂白猝灭剂。 为了放大来自信息层的光，可以提供光电导层和附加的电致发光层。

公开(公告)号：US07116628B2

公开(公告)日：2006-10-03

申请号：US10986880

申请日：2004-11-15

申请人： Serguei Magnitski ,  Andrei Tarasishin ,  Eugene Levich ,  Jacob Malkin ,  Tatiana Lissovskaia ,  Iossif Diskine ,  Zeev Averbuch ,  Boris Chernobrod

发明人： Serguei Magnitski ,  Andrei Tarasishin ,  Eugene Levich ,  Jacob Malkin ,  Tatiana Lissovskaia ,  Iossif Diskine ,  Zeev Averbuch ,  Boris Chernobrod

IPC分类号： G11B9/00

CPC分类号： G11C13/047 ,  G11B7/08511 ,  G11B7/24012 ,  G11B7/24038 ,  G11B7/245 ,  G11B7/246 ,  G11B7/2467 ,  G11B7/2472 ,  G11B7/2533 ,  G11B2007/24612 ,  G11B2007/24624 ,  G11C11/42 ,  G11C13/04 ,  Y10T428/24479

摘要： An optical information storage medium has multiple information layers. On each layer, information is stored in the form of an electroluminescent material. The pits are organized into regions called pages. A specific page on a specific layer can be addressed through electrodes integrated into the medium. The medium can be read-only or WORM. For the WORM embodiment, a recordable electroluminescent material is combined with a quencher and a free radical generating compound that, when thermally degraded, generates free radicals to bleach the quencher. To amplify the light from an information layer, a photoconductive layer and an additional electroluminescent layer can be provided.

摘要翻译： 光信息存储介质具有多个信息层。 在每个层上，以电致发光材料的形式存储信息。 这些坑被组织成称为页面的区域。 可以通过集成到介质中的电极来寻址特定层上的特定页面。 介质可以是只读或WORM。 对于WORM实施例，可记录的电致发光材料与猝灭剂和产生自由基的化合物组合，当热降解时，其产生自由基以漂白猝灭剂。 为了放大来自信息层的光，可以提供光电导层和附加的电致发光层。

公开(公告)号：US5331659A

公开(公告)日：1994-07-19

申请号：US31098

申请日：1993-03-11

申请人： Toyoharu Ohata ,  Kazuhiko Nemoto ,  Masamichi Ogawa

发明人： Toyoharu Ohata ,  Kazuhiko Nemoto ,  Masamichi Ogawa

IPC分类号： G11C11/42 ,  H01L31/153 ,  H01S5/026 ,  H01S5/06 ,  H01S5/18 ,  H01S5/187 ,  H01S5/227 ,  H01S5/42 ,  H01S3/19

CPC分类号： G11C11/42 ,  H01L31/153 ,  H01S5/026 ,  H01S5/0261 ,  H01S5/0608 ,  H01S5/0611 ,  H01S5/18 ,  H01S5/187 ,  H01S5/227 ,  H01S5/42

摘要： An optical semiconductor device in which both of positive input and negative input are possible is disclosed. In the optical semiconductor device, two heterojunction phototransistors are connected in parallel of each other to the cathode of a laser diode. An optical memory in which setting, i.e., writing and resetting, i.e., erasing by light are possible is also disclosed. In the optical memory, two heterojunction phototransistors are connected in parallel of each other to the cathode of a laser diode to make a memory cell.

摘要翻译： 公开了一种其中正输入和负输入都是可能的光半导体器件。 在光半导体器件中，两个异质结光电晶体管彼此并联连接到激光二极管的阴极。 还公开了一种光存储器，其中设置，即写入和复位，即通过光擦除是可能的。 在光学存储器中，两个异质结光电晶体管彼此并联连接到激光二极管的阴极以形成存储单元。

公开(公告)号：US5095200A

公开(公告)日：1992-03-10

申请号：US640278

申请日：1991-01-11

申请人： Kenichi Matsuda ,  Jun Shibata

发明人： Kenichi Matsuda ,  Jun Shibata

IPC分类号： G06E3/00 ,  G11C11/42 ,  H03K3/42 ,  H03K17/795

CPC分类号： H03K17/7955 ,  G06E3/006 ,  G11C11/42 ,  H03K3/42

摘要： An optoelectronic memory, logic, and interconnection device having an optical bistable circuit as an essential element. The optical bistable circuit includes an optical bistable switch which is a light emitting device and a first phototransistor detecting the light emitted from the light emitting device, connected in series, a second phototransistor connected in parallel to the optical bistable switch which does not detect the light emitted from the light emitting device, and a load resistor connected in series to the optical bistable switch. The optoelectronic memory, logic, and interconnection device operates as an optoelectronic memory device turned on and off with the same light source, as an optoelectronic logic device executing exclusive OR operation, or as a light source for reconfigurable optical interconnection.

摘要翻译： 具有光学双稳态电路作为必需元件的光电存储器，逻辑和互连器件。 光学双稳态电路包括光双稳态开关，其是发光器件和第一光电晶体管，其检测从串联连接的发光器件发射的光，并联连接到不检测光的光学双稳态开关的第二光电晶体管 从发光器件发射的负载电阻器和与光学双稳态开关串联连接的负载电阻器。 光电存储器，逻辑器件和互连器件作为光电存储器件工作，作为与执行异或运算的光电逻辑器件相同的光源，或作为用于可重构光互连的光源而导通和截止的光电存储器件。

公开(公告)号：US4964687A

公开(公告)日：1990-10-23

申请号：US414016

申请日：1989-09-29

申请人： R. Aaron Falk

发明人： R. Aaron Falk

IPC分类号： G02B6/28 ,  G11C11/42

CPC分类号： G11C11/42 ,  G02B6/2861

摘要： An optical latch includes first and second optical switches arranged in series. An input signal is received in the first optical switch and is passed through to the second optical switch. The second optical switch latches-up to this received signal. Then the first optical switch is disabled to isolate the second optical switch from inputs to the first optical switch. Feedback lines from the output of the second optical switch to the input of the second optical switch ensure that the second optical switch remains latched. Switching signals are provided at appropriate timing to ensure correct operation of the optical latch.

摘要翻译： 光锁存器包括串联布置的第一和第二光开关。 输入信号被接收在第一光开关中，并通过第二光开关。 第二个光开关锁定到该接收信号。 然后，禁用第一光开关以将第二光开关与输入隔离到第一光开关。 从第二光开关的输出到第二光开关的输入的反馈线确保第二光开关保持锁存。 在适当的定时提供开关信号以确保光锁存器的正确操作。