公开(公告)号：US20210257021A1

公开(公告)日：2021-08-19

申请号：US17175678

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： G11C11/42 ,  G11C5/04 ,  G11C5/06

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20220166533A1

公开(公告)日：2022-05-26

申请号：US17527483

申请日：2021-11-16

申请人： Ayar Labs, Inc.

发明人： Vladimir Stojanovic ,  Hugo Saleh ,  Roy Edward Meade

IPC分类号： H04J14/02 ,  H04L12/931 ,  H04Q11/00

摘要： A network switch system-in-package includes a carrier substrate with a network switch chip and a plurality of photonic input/output modules disposed on the carrier substrate. Each of the plurality of photonic input/output modules includes a module substrate and a plurality of photonic chip pods disposed on the module substrate. Each photonic chip pod includes a pod substrate with a photonic input/output chiplet and a gearbox chiplet attached to the pod substrate. The photonic input/output chiplet includes a parallel electrical interface, a photonic interface, and a plurality of optical macros implemented between the photonic interface and the parallel electrical interface. The gearbox chiplet electrically connects with the parallel electrical interface of the photonic input/output chiplet and a serial electrical interface of the network switch chip. The gearbox chiplet converts between the parallel electrical interface of the photonic input/output chiplet and the serial electrical interface of the network switch chip.

公开(公告)号：US11233580B2

公开(公告)日：2022-01-25

申请号：US17175678

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  H04B10/80 ,  H04B10/516

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20230370170A1

公开(公告)日：2023-11-16

申请号：US18354379

申请日：2023-07-18

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/80 ,  H04B10/516 ,  G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  G02B6/42 ,  G11C5/14

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20210258078A1

公开(公告)日：2021-08-19

申请号：US17175677

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/80 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US20240187110A1

公开(公告)日：2024-06-06

申请号：US18419461

申请日：2024-01-22

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/80 ,  G02B6/42 ,  G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/516

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US11916602B2

公开(公告)日：2024-02-27

申请号：US17175677

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/00 ,  H04B10/80 ,  H04B10/516 ,  G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  G02B6/42 ,  G11C5/14 ,  H04J14/00

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US11705972B2

公开(公告)日：2023-07-18

申请号：US17583967

申请日：2022-01-25

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/80 ,  H04B10/516 ,  G02B6/42

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

公开(公告)号：US20220148627A1

公开(公告)日：2022-05-12

申请号：US17583967

申请日：2022-01-25

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： G11C5/04 ,  G11C5/14 ,  G02B6/42

摘要： A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.