摘要:
Provided are a method and apparatus for remapping logical to physical addresses for a non-volatile memory having dies. Bands extend through the dies and planes in the dies extending through the bands define addressable blocks. A first remapping of a logical-to-physical mapping is performed by remapping logical addresses of blocks in a first end of the bands that map to defective physical blocks to map to good physical blocks at a second end of the bands. After performing the first remapping, a second remapping of the logical-to-physical mapping is performed by remapping logical addresses in the second end of bands that map to defective blocks to map to good physical blocks in the first end of bands.
摘要:
Provided are a method and apparatus for remapping logical to physical addresses for a non-volatile memory having dies. Bands extend through the dies and planes in the dies extending through the bands define addressable blocks. A first remapping of a logical-to-physical mapping is performed by remapping logical addresses of blocks in a first end of the bands that map to defective physical blocks to map to good physical blocks at a second end of the bands. After performing the first remapping, a second remapping of the logical-to-physical mapping is performed by remapping logical addresses in the second end of bands that map to defective blocks to map to good physical blocks in the first end of bands.
摘要:
A system that includes a storage drive and a controller communicatively coupled to the storage drive. The storage drive includes a first region of storage space that is mapped to a virtual volume and at least a second region of storage space reserved for over-provisioning operations. The controller is to unmap an operable portion of the first region of storage space in response to aging of the storage drive so that the unmapped portion can be used for over-provisioning operations.
摘要:
A system on-chip includes a central processing unit and a memory controller. The memory controller receives initialization information indicating an initialization address range and an initialization value from the central processing unit, determines an initialization target memory and a local initialization address range of the initialization target memory based on the initialization information, and transmits initialization data including the initialization value to the initialization target memory by a predetermined unit to initialize the local initialization address range of the initialization target memory.
摘要:
A system and method is described that allows random write operations regions utilizing shingled magnetic recording. The method includes receiving a request to re-write a logical block address (LBA) with new data, wherein the LBA is mapped to a physical block address (PBA) on a storage medium. The method further includes determining whether the data is eligible for a write-in place update wherein the data is written to an area of the I-region that has previously been written with shingled data tracks, wherein the eligibility determination is based on a mapping list of LBAs to PBAs. The method also includes writing the new data to the area of the I-region determined to be eligible for a write-in place update, wherein writing the new data further includes writing management information to the I-region that identifies a starting LBA of the write-in place update, and a length of the write-in place update.
摘要:
A tape drive is provided, which executes an optimum writing method even when overwrite is intervened between mixed read and write operations. When an overwrite command is received while executing the mixed operations, which writes to a predetermined tape position, when a tape position to overwrite on is encountered before the append-written data ending position of the tape (tape EOD), the overwritten tape position is regarded as the append-written data ending position of the tape (tape EOD) to update the tape EOD by the overwritten tape position. When a tape position to overwrite is encountered after the append-written data ending position of the tape (tape EOD), the overwritten tape position is updated by the append-written data ending position of a non-volatile memory (non-volatile EOD). The updating the EODs enhances the performance of the mixed read and write operations even when an overwrite command is intervening.
摘要:
A method and device for sharing data. The method include: receiving, by a direct memory access controller, a data read instruction; wherein the read data instruction can be a shared data read instruction or a non-shared data read instruction; determining whether to fetch a requested data block from a first memory unit to a second memory unit by applying a direct memory address control operation; wherein the second memory unit is accessible by a processor that generated the shared data read instruction; fetching the requested data block from the first memory unit to the second memory unit by applying a direct memory access control operation, if the read data instruction is a non-shared data instruction or if the read data instruction is a shared data instruction but the requested data is not stored in the second memory unit; and retrieving a requested data block from a second memory unit.
摘要:
Data is processed in an embedded system by writing data read from a peripheral device in response to an event to memory external to the embedded system. The data or a portion of the data is copied to memory internal to the embedded system. Which portion of the data is stored in both the external memory and the internal memory is tracked. The copied data is retrieved from the internal memory by a processor included in the embedded system. The processor has one or more caches logically and physically separated from the internal memory. The processor uses the copied data it retrieved to begin servicing the event.
摘要:
A processor and a memory controlling method. The processor enables a Scratch-Pad Memory (SPM) to prepare data that a processor core intends to process, using a data management unit including a data cache, thereby increasing a data processing rate.
摘要:
Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application program interface (API), and part managed by hardware. Thus, the software applications can provide guidance regarding address ranges to maintain close to the processor to reduce unnecessary latencies typically encountered when dependent upon cache controller policies. Several embodiments utilize a memory internal to the processor or on a processor node so the memory block used for this technique is referred to as OCM.