METHOD AND APPARATUS FOR DEFECT MANAGEMENT IN A NON-VOLATILE MEMORY DEVICE
    2.
    发明申请
    METHOD AND APPARATUS FOR DEFECT MANAGEMENT IN A NON-VOLATILE MEMORY DEVICE 有权
    非易失性存储器件缺陷管理的方法与装置

    公开(公告)号:US20170046073A1

    公开(公告)日:2017-02-16

    申请号:US14822793

    申请日:2015-08-10

    申请人: INTEL CORPORATION

    IPC分类号: G06F3/06 G11C5/02 G06F12/10

    摘要: Provided are a method and apparatus for remapping logical to physical addresses for a non-volatile memory having dies. Bands extend through the dies and planes in the dies extending through the bands define addressable blocks. A first remapping of a logical-to-physical mapping is performed by remapping logical addresses of blocks in a first end of the bands that map to defective physical blocks to map to good physical blocks at a second end of the bands. After performing the first remapping, a second remapping of the logical-to-physical mapping is performed by remapping logical addresses in the second end of bands that map to defective blocks to map to good physical blocks in the first end of bands.

    摘要翻译: 提供了一种用于对具有管芯的非易失性存储器重新映射逻辑到物理地址的方法和装置。 带延伸穿过模具,延伸穿过带的模具中的平面定义可寻址块。 通过重新映射映射到不良物理块的频带的第一端中的块的逻辑地址,以在频带的第二端映射到良好的物理块来执行逻辑到物理映射的第一重映射。 在执行第一重映射之后,通过重新映射映射到缺陷块的频带的第二端中的逻辑地址来进行逻辑到物理映射的第二重映射,以映射到频带的第一端中的良好的物理块。

    SYSTEM ON-CHIP AND ELECTRONIC DEVICE INCLUDING THE SAME
    4.
    发明申请
    SYSTEM ON-CHIP AND ELECTRONIC DEVICE INCLUDING THE SAME 审中-公开
    包括其的系统片上和电子设备

    公开(公告)号:US20160299842A1

    公开(公告)日:2016-10-13

    申请号:US14995804

    申请日:2016-01-14

    摘要: A system on-chip includes a central processing unit and a memory controller. The memory controller receives initialization information indicating an initialization address range and an initialization value from the central processing unit, determines an initialization target memory and a local initialization address range of the initialization target memory based on the initialization information, and transmits initialization data including the initialization value to the initialization target memory by a predetermined unit to initialize the local initialization address range of the initialization target memory.

    摘要翻译: 片上系统包括中央处理单元和存储器控制器。 存储器控制器从中央处理单元接收指示初始化地址范围和初始化值的初始化信息,基于初始化信息确定初始化目标存储器的初始化目标存储器和本地初始化地址范围,并且发送包括初始化 通过预定单元向初始化目标存储器发送初始化初始化目标存储器的本地初始化地址范围的值。

    System and method of conducting in-place write operations in a shingled magnetic recording (SMR) drive
    5.
    发明授权
    System and method of conducting in-place write operations in a shingled magnetic recording (SMR) drive 有权
    在带状磁记录(SMR)驱动器中进行就地写入操作的系统和方法

    公开(公告)号:US09454990B1

    公开(公告)日:2016-09-27

    申请号:US14673342

    申请日:2015-03-30

    发明人: Ryoji Fukuhisa

    摘要: A system and method is described that allows random write operations regions utilizing shingled magnetic recording. The method includes receiving a request to re-write a logical block address (LBA) with new data, wherein the LBA is mapped to a physical block address (PBA) on a storage medium. The method further includes determining whether the data is eligible for a write-in place update wherein the data is written to an area of the I-region that has previously been written with shingled data tracks, wherein the eligibility determination is based on a mapping list of LBAs to PBAs. The method also includes writing the new data to the area of the I-region determined to be eligible for a write-in place update, wherein writing the new data further includes writing management information to the I-region that identifies a starting LBA of the write-in place update, and a length of the write-in place update.

    摘要翻译: 描述了允许随机写入操作区域利用带状磁记录的系统和方法。 该方法包括接收用新数据重新写入逻辑块地址(LBA)的请求,其中LBA映射到存储介质上的物理块地址(PBA)。 该方法还包括确定数据是否符合写入位置更新的资格,其中数据被写入先前已经用带有杂音的数据轨道写入的I区域的区域,其中资格确定基于映射列表 的LBA到PBA。 该方法还包括将新数据写入被确定为有资格进行写入位置更新的I区域的区域,其中写入新数据还包括将I-area写入管理信息,该I区域标识起始LBA 写入更新,以及写入位置更新的长度。

    Device having data sharing capabilities and a method for sharing data
    7.
    发明授权
    Device having data sharing capabilities and a method for sharing data 有权
    具有数据共享功能的设备和共享数据的方法

    公开(公告)号:US08239587B2

    公开(公告)日:2012-08-07

    申请号:US12161524

    申请日:2006-01-18

    IPC分类号: G06F13/28

    摘要: A method and device for sharing data. The method include: receiving, by a direct memory access controller, a data read instruction; wherein the read data instruction can be a shared data read instruction or a non-shared data read instruction; determining whether to fetch a requested data block from a first memory unit to a second memory unit by applying a direct memory address control operation; wherein the second memory unit is accessible by a processor that generated the shared data read instruction; fetching the requested data block from the first memory unit to the second memory unit by applying a direct memory access control operation, if the read data instruction is a non-shared data instruction or if the read data instruction is a shared data instruction but the requested data is not stored in the second memory unit; and retrieving a requested data block from a second memory unit.

    摘要翻译: 用于共享数据的方法和设备。 该方法包括:通过直接存储器访问控制器接收数据读取指令; 其中所述读取数据指令可以是共享数据读取指令或非共享数据读取指令; 通过应用直接存储器地址控制操作来确定是否将所请求的数据块从第一存储器单元提取到第二存储器单元; 其中所述第二存储器单元可由生成所述共享数据读取指令的处理器访问; 如果读数据指令是非共享数据指令,或者读数据指令是共享数据指令,但是请求的数据指令是共享数据指令,则通过应用直接存储器访问控制操作,将所请求的数据块从第一存储器单元提取到第二存储器单元 数据不存储在第二存储器单元中; 以及从第二存储器单元检索所请求的数据块。

    High Speed Memory Access in an Embedded System
    8.
    发明申请
    High Speed Memory Access in an Embedded System 有权
    嵌入式系统中的高速内存访问

    公开(公告)号:US20120151103A1

    公开(公告)日:2012-06-14

    申请号:US13372517

    申请日:2012-02-14

    申请人: Chunfeng Hu

    发明人: Chunfeng Hu

    IPC分类号: G06F13/28

    摘要: Data is processed in an embedded system by writing data read from a peripheral device in response to an event to memory external to the embedded system. The data or a portion of the data is copied to memory internal to the embedded system. Which portion of the data is stored in both the external memory and the internal memory is tracked. The copied data is retrieved from the internal memory by a processor included in the embedded system. The processor has one or more caches logically and physically separated from the internal memory. The processor uses the copied data it retrieved to begin servicing the event.

    摘要翻译: 通过将从外围设备读取的数据响应于嵌入式系统外部的存储器的事件写入嵌入式系统中的数据。 数据或数据的一部分被复制到嵌入式系统内部的存储器中。 跟踪数据的哪一部分存储在外部存储器和内部存储器中。 通过嵌入式系统中包括的处理器从内部存储器检索复制的数据。 处理器在逻辑上和物理上与内部存储器分离一个或多个高速缓存。 处理器使用其检索的复制数据开始服务事件。