公开(公告)号：US20120052644A1

公开(公告)日：2012-03-01

申请号：US12868739

申请日：2010-08-26

Applicant: Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

Inventor： Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

IPC: H01L21/336

CPC classification number: H01L29/66636 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/7834

Abstract: The invention discloses a method for fabricating a MOS transistor. A substrate having thereon a gate structure is provided. A silicon nitride layer is deposited on the gate structure. A dry etching process is then performed to define a silicon nitride spacer on each sidewall of the gate structure and a recess in a source/drain region on each side of the gate structure. A transitional layer covering the gate structure and the recess is deposited. A pre-epitaxial clean process is performed to remove the transitional layer. The substrate is subjected to a pre-bake process. An epitaxial growth process is performed to grow an embedded SiGe layer in the recess. The disposable silicon nitride spacer is removed.

Abstract translation: 本发明公开了一种制造MOS晶体管的方法。 提供其上具有栅极结构的基板。 氮化硅层沉积在栅极结构上。 然后执行干蚀刻工艺以在栅极结构的每个侧壁上限定氮化硅间隔物，并且在栅极结构的每一侧上的源极/漏极区域中形成凹陷。 沉积覆盖栅极结构和凹陷的过渡层。 执行预外延清洁处理以去除过渡层。 对基板进行预烘烤处理。 进行外延生长工艺以在凹槽中生长嵌入的SiGe层。 去除一次性氮化硅间隔物。

公开(公告)号：US20120068268A1

公开(公告)日：2012-03-22

申请号：US12888351

申请日：2010-09-22

Applicant: Tsai-Fu Hsiao ,  Tsuo-Wen Lu ,  Yu-Ren Wang

Inventor： Tsai-Fu Hsiao ,  Tsuo-Wen Lu ,  Yu-Ren Wang

IPC: H01L27/088 ,  H01L21/336

CPC classification number: H01L29/785 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/41775 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7833 ,  H01L29/7848

Abstract: A method of fabricating a transistor structure includes the step of providing a substrate having a gate thereon. Then, a first spacer is formed at two sides of the gate. After that, an LDD region is formed in the substrate at two sides of the gate. Later, a second spacer comprising a carbon-containing spacer and a sacrificing spacer is formed on the first spacer. Subsequently, a source/drain region is formed in the substrate at two sides of the gate. Finally, the sacrificing spacer is removed entirely, and part of the carbon-containing spacer is also removed. The remaining carbon-containing spacer has an L shape. The carbon-containing spacer has a first carbon concentration, and the sacrificing spacer has a second carbon concentration. The first carbon concentration is greater than the second carbon concentration.

Abstract translation: 制造晶体管结构的方法包括提供其上具有栅极的衬底的步骤。 然后，在栅极的两侧形成第一间隔物。 之后，在栅极两侧的基板上形成LDD区域。 之后，在第一间隔物上形成包含含碳间隔物和牺牲间隔物的第二间隔物。 随后，在栅极两侧的基板中形成源/漏区。 最后，完全除去牺牲间隔物，并且还除去部分含碳间隔物。 剩余的含碳隔离物具有L形。 含碳隔离物具有第一碳浓度，牺牲间隔物具有第二碳浓度。 第一个碳浓度大于第二个碳浓度。

公开(公告)号：US20120202328A1

公开(公告)日：2012-08-09

申请号：US13450476

申请日：2012-04-19

Applicant: Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

Inventor： Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

IPC: H01L21/336

CPC classification number: H01L29/66636 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/7834

Abstract: The invention discloses a method for fabricating a MOS transistor. A substrate having thereon a gate structure is provided. A silicon nitride layer is deposited on the gate structure. A dry etching process is then performed to define a silicon nitride spacer on each sidewall of the gate structure and a recess in a source/drain region on each side of the gate structure. A transitional layer covering the gate structure and the recess is deposited. A pre-epitaxial clean process is performed to remove the transitional layer. The substrate is subjected to a pre-bake process. An epitaxial growth process is performed to grow an embedded SiGe layer in the recess. The disposable silicon nitride spacer is removed.

公开(公告)号：US08183118B2

公开(公告)日：2012-05-22

申请号：US12868739

申请日：2010-08-26

Applicant: Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

Inventor： Tsuo-Wen Lu ,  Tsai-Fu Hsiao ,  Yu-Ren Wang ,  Shu-Yen Chan

IPC: H01L21/336

CPC classification number: H01L29/66636 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/7834

Abstract: The invention discloses a method for fabricating a MOS transistor. A substrate having thereon a gate structure is provided. A silicon nitride layer is deposited on the gate structure. A dry etching process is then performed to define a silicon nitride spacer on each sidewall of the gate structure and a recess in a source/drain region on each side of the gate structure. A transitional layer covering the gate structure and the recess is deposited. A pre-epitaxial clean process is performed to remove the transitional layer. The substrate is subjected to a pre-bake process. An epitaxial growth process is performed to grow an embedded SiGe layer in the recess. The disposable silicon nitride spacer is removed.

Abstract translation: 本发明公开了一种制造MOS晶体管的方法。 提供其上具有栅极结构的基板。 氮化硅层沉积在栅极结构上。 然后执行干蚀刻工艺以在栅极结构的每个侧壁上限定氮化硅间隔物，并且在栅极结构的每一侧上的源极/漏极区域中形成凹陷。 沉积覆盖栅极结构和凹陷的过渡层。 执行预外延清洁处理以去除过渡层。 对基板进行预烘烤处理。 进行外延生长工艺以在凹槽中生长嵌入的SiGe层。 去除一次性氮化硅间隔物。

公开(公告)号：US20110159658A1

公开(公告)日：2011-06-30

申请号：US13043443

申请日：2011-03-08

Applicant: Tsai-Fu Hsiao ,  Ching-I Li ,  Po-Yuan Chen ,  Chun-An Lin ,  Hsiang-Ying Wang ,  Chao-Chun Chen ,  Chin-Cheng Chien

Inventor： Tsai-Fu Hsiao ,  Ching-I Li ,  Po-Yuan Chen ,  Chun-An Lin ,  Hsiang-Ying Wang ,  Chao-Chun Chen ,  Chin-Cheng Chien

IPC: H01L21/265

CPC classification number: H01L21/324 ,  H01L21/265 ,  H01L21/2652 ,  H01L29/6659

Abstract: A method for fabricating a metal-oxide semiconductor transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a gate structure on the semiconductor substrate; and performing a first ion implantation process to implant a first molecular cluster having carbon, boron, and hydrogen into the semiconductor substrate at two sides of the gate structure for forming a doped region, wherein the molecular weight of the first molecular cluster is greater than 100.

Abstract translation: 公开了一种制造金属氧化物半导体晶体管的方法。 该方法包括以下步骤：提供半导体衬底; 在所述半导体衬底上形成栅极结构; 以及执行第一离子注入工艺以在所述栅极结构的两侧将具有碳，硼和氢的第一分子簇注入到所述半导体衬底中，以形成掺杂区域，其中所述第一分子簇的分子量大于100 。

公开(公告)号：US20100144110A1

公开(公告)日：2010-06-10

申请号：US12701612

申请日：2010-02-08

Applicant: Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

Inventor： Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

IPC: H01L21/265

CPC classification number: H01L21/26506 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/6659

Abstract: A method of forming a MOS transistor, in which, a co-implantation is performed to implant a carbon co-implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect, and the carbon co-implant is from a precursor comprising CO or CO2.

公开(公告)号：US20080258178A1

公开(公告)日：2008-10-23

申请号：US12127787

申请日：2008-05-27

Applicant: Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

Inventor： Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

IPC: H01L29/93 ,  H01L21/8238

CPC classification number: H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L29/6659

Abstract: A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect. The implant comprises carbon, a hydrocarbon, or a derivative of the hydrocarbon, such as one selected from a group consisting of CO, CO2, CxHy+, and (CxHy)n+, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of to 1000.

Abstract translation: 一种形成MOS晶体管的方法，其中执行共注入以将注入植入源区域和漏区域或晕圈注入区域中，以有效地防止掺杂剂在源区和漏区中的过度扩散或 用于获得良好的接合曲线并改善短沟道效应。 植入物包括碳，烃或烃的衍生物，例如选自CO，CO 2 CO 2，C x H y ＆lt; / SUB＆gt;＆lt; SUP＆gt; +＆lt; / SUP＆gt;和（C＆lt; x＆lt; H＆gt; 其中，x为1〜10的数，y为4〜20的数，n为1000的数。

公开(公告)号：US20070238234A1

公开(公告)日：2007-10-11

申请号：US11278434

申请日：2006-04-03

Applicant: Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

Inventor： Hsiang-Ying Wang ,  Chin-Cheng Chien ,  Tsai-Fu Hsiao ,  Ming-Yen Chien ,  Chao-Chun Chen

IPC: H01L21/8234 ,  H01L29/76

CPC classification number: H01L21/2658 ,  H01L21/26506 ,  H01L29/6659

Abstract: A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants from over diffusion in the source region and the drain region or the halo implanted region, for obtaining a good junction profile and improving short channel effect. The implant comprises carbon, a hydrocarbon, or a derivative of the hydrocarbon, such as one selected from a group consisting of C, CxHy+, and (CxHy)n+, wherein x is a number of 1 to 10, y is a number of 4 to 20, and n is a number of 1 to 1000.

Abstract translation: 一种形成MOS晶体管的方法，其中执行共注入以将注入植入源区域和漏区域或晕圈注入区域中，以有效地防止掺杂剂在源区和漏区中的过度扩散或 用于获得良好的接合曲线并改善短沟道效应。 植入物包括碳，烃或烃的衍生物，例如选自C，C H，H，O，O， SUP＆gt;和（C x H x H y）其中x是1至10的数 y为4〜20的数，n为1〜1000的数。

公开(公告)号：US08076210B2

公开(公告)日：2011-12-13

申请号：US13043443

申请日：2011-03-08

Applicant: Tsai-Fu Hsiao ,  Ching-I Li ,  Po-Yuan Chen ,  Chun-An Lin ,  Hsiang-Ying Wang ,  Chao-Chun Chen ,  Chin-Cheng Chien

Inventor： Tsai-Fu Hsiao ,  Ching-I Li ,  Po-Yuan Chen ,  Chun-An Lin ,  Hsiang-Ying Wang ,  Chao-Chun Chen ,  Chin-Cheng Chien

IPC: H01L21/336

CPC classification number: H01L21/324 ,  H01L21/265 ,  H01L21/2652 ,  H01L29/6659

Abstract: A method for fabricating a metal-oxide semiconductor transistor is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a gate structure on the semiconductor substrate; and performing a first ion implantation process to implant a first molecular cluster having carbon, boron, and hydrogen into the semiconductor substrate at two sides of the gate structure for forming a doped region, wherein the molecular weight of the first molecular cluster is greater than 100.

Abstract translation: 公开了一种制造金属氧化物半导体晶体管的方法。 该方法包括以下步骤：提供半导体衬底; 在所述半导体衬底上形成栅极结构; 以及执行第一离子注入工艺以在所述栅极结构的两侧将具有碳，硼和氢的第一分子簇注入到所述半导体衬底中，以形成掺杂区域，其中所述第一分子簇的分子量大于100 。

公开(公告)号：US07927954B2

公开(公告)日：2011-04-19

申请号：US11678627

申请日：2007-02-26

Applicant: Shyh-Fann Ting ,  Cheng-Tung Huang ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Wen-Han Hung ,  Tzyy-Ming Cheng ,  Meng-Yi Wu ,  Tsai-Fu Hsiao ,  Shu-Yen Chan

Inventor： Shyh-Fann Ting ,  Cheng-Tung Huang ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Wen-Han Hung ,  Tzyy-Ming Cheng ,  Meng-Yi Wu ,  Tsai-Fu Hsiao ,  Shu-Yen Chan

IPC: H01L21/336

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

Abstract: A method for fabricating strained-silicon transistors is disclosed. First, a semiconductor substrate is provided and a gate structure and a spacer surrounding the gate structure are disposed on the semiconductor substrate. A source/drain region is then formed in the semiconductor substrate around the spacer, and a first rapid thermal annealing process is performed to activate the dopants within the source/drain region. An etching process is performed to form a recess around the gate structure and a selective epitaxial growth process is performed to form an epitaxial layer in the recess. A second rapid thermal annealing process is performed to redefine the distribution of the dopants within the source/drain region and repair the damaged bonds of the dopants.

Abstract translation: 公开了制造应变硅晶体管的方法。 首先，提供半导体衬底，并且在半导体衬底上设置栅极结构和围绕栅极结构的间隔物。 然后在隔离物周围的半导体衬底中形成源极/漏极区域，并且执行第一快速热退火处理以激活源极/漏极区域内的掺杂剂。 执行蚀刻工艺以在栅极结构周围形成凹陷，并且执行选择性外延生长工艺以在凹部中形成外延层。 执行第二快速热退火处理以重新定义源/漏区域内的掺杂剂的分布并修复掺杂剂的损坏的键。