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    Polymer libraries on a substrate, method of forming polymer libraries on a substrate and characterization methods with same
    1.
    发明授权
    Polymer libraries on a substrate, method of forming polymer libraries on a substrate and characterization methods with same 失效
    衬底上的聚合物文库，在衬底上形成聚合物文库的方法及其表征方法

    公开(公告)号：US06828096B1

    公开(公告)日：2004-12-07

    申请号：US09567598

    申请日：2000-05-10

    申请人： Thomas R. Boussie ,  Martin Devenney

    发明人： Thomas R. Boussie ,  Martin Devenney

    IPC分类号： C12Q168

    CPC分类号： B82Y25/00 ,  B01J19/0046 ,  B01J2219/00351 ,  B01J2219/0059 ,  B01J2219/00592 ,  B01J2219/00599 ,  B01J2219/0065 ,  B01J2219/00659 ,  B01J2219/00702 ,  B01J2219/00745 ,  B01J2219/00754 ,  C01B13/185 ,  C40B40/18 ,  C40B50/08 ,  C40B60/14

    摘要： This invention relates to a method to characterize an array of polymeric materials comprising: depositing unsilanizable material onto a silanizable substrate in at least 10 regions, thereafter contacting the substrate with an organosilane agent thereby silanizing the substrate but not the unsilanizable material in said regions, optionally, partially or completely removing the unsilanizable material, depositing at least 10 polymeric materials onto said regions, and characterizing the materials. This invention also relates to method for forming an array of polymeric materials to be characterized onto a substrate comprising: (a) selecting ten or more polymers, (b) dissolving or suspending each polymer in a separate liquid, and (c) depositing a uniform amount of each of the ten or more polymer containing liquids onto a substrate in individual hydrophilic and/or hydrophobic regions.

    摘要翻译： 本发明涉及一种表征聚合物材料阵列的方法，包括：在至少10个区域中将不可硅化的材料沉积在可硅烷化的基底上，然后使基底与有机硅烷试剂接触，从而使基底硅烷化，而不是所述区域中的不可硅化的材料，任选地 部分或完全去除不可消解的材料，在所述区域上沉积至少10种聚合物材料，并表征材料。 本发明还涉及形成要表征在基材上的聚合物材料阵列的方法，其包括：（a）选择十种或更多种聚合物，（b）将每种聚合物溶解或悬浮在单独的液体中，和（c） 在单独的亲水和/或疏水区域中的十种或更多种含聚合物的液体中的每一种在基材上的量。

    Polymer libraries on a substrate
    2.
    发明授权
    Polymer libraries on a substrate 失效
    基材上的聚合物文库

    公开(公告)号：US06872534B2

    公开(公告)日：2005-03-29

    申请号：US10210915

    申请日：2002-08-02

    申请人： Thomas R. Boussie ,  Martin Devenney

    发明人： Thomas R. Boussie ,  Martin Devenney

    IPC分类号： G01N31/22 ,  B01J19/00 ,  C07B61/00 ,  C40B40/14 ,  G01N33/53 ,  G01N37/00 ,  C12Q1/68

    CPC分类号： B01J19/0046 ,  B01J2219/00497 ,  B01J2219/00527 ,  B01J2219/00585 ,  B01J2219/0059 ,  B01J2219/00596 ,  B01J2219/00605 ,  B01J2219/00612 ,  B01J2219/00619 ,  B01J2219/00621 ,  B01J2219/0063 ,  B01J2219/00637 ,  B01J2219/00659 ,  B01J2219/00722 ,  C40B40/14 ,  Y10T428/24331 ,  Y10T428/24802 ,  Y10T428/31504

    摘要： This invention relates to a method to characterize an array of polymeric materials comprising: depositing unsilanizable material onto a silanizable substrate in at least 10 regions, thereafter contacting the substrate with an organosilane agent thereby silanizing the substrate but not the unsilanizable material in said regions, optionally, partially or completely removing the unsilanizable material, depositing at least 10 polymeric materials onto said regions, and characterizing the materials. This invention also relates to method for forming an array of polymeric materials to be characterized onto a substrate comprising: (a) selecting ten or more polymers, (b) dissolving or suspending each polymer in a separate liquid, and (c) depositing a uniform amount of each of the ten or more polymer containing liquids onto a substrate in individual hydrophilic and/or hydrophobic regions. Likewise this invention also relates to an array of polymeric materials for use in characterization, comprising: (a) a substrate having multiple regions on the substrate that are not coated with an organosilane and wherein the uncoated regions have a boarder of an organosilane agent coated on the substrate, and (b) a polymer deposited on the regions not coated with an organosilane agent.

    摘要翻译： 本发明涉及一种表征聚合物材料阵列的方法，包括：在至少10个区域中将不可硅化的材料沉积在可硅烷化的基底上，然后使基底与有机硅烷试剂接触，从而使基底硅烷化，而不是所述区域中的不可硅化的材料，任选地 部分或完全去除不可消解的材料，在所述区域上沉积至少10种聚合物材料，并表征材料。 本发明还涉及形成要表征在基材上的聚合物材料阵列的方法，其包括：（a）选择十种或更多种聚合物，（b）将每种聚合物溶解或悬浮在单独的液体中，和（c） 在单独的亲水和/或疏水区域中的十种或更多种含聚合物的液体中的每一种在基材上的量。 同样，本发明还涉及用于表征的聚合物材料阵列，其包括：（a）基底上具有未涂覆有机硅烷的多个区域，其中未涂覆区域具有涂覆在有机硅烷试剂上的边界 底物，和（b）沉积在未涂覆有机硅烷试剂的区域上的聚合物。

    FORMATION OF A MASKING LAYER ON A DIELECTRIC REGION TO FACILITATE FORMATION OF A CAPPING LAYER ON ELECTRICALLY CONDUCTIVE REGIONS SEPARATED BY THE DIELECTRIC REGION
    9.
    发明申请
    FORMATION OF A MASKING LAYER ON A DIELECTRIC REGION TO FACILITATE FORMATION OF A CAPPING LAYER ON ELECTRICALLY CONDUCTIVE REGIONS SEPARATED BY THE DIELECTRIC REGION 有权
    在电介质区域形成电介质层上的掩蔽层以形成电介质区分开的导电区域上的覆盖层

    公开(公告)号：US20080246150A1

    公开(公告)日：2008-10-09

    申请号：US12124113

    申请日：2008-05-20

    申请人： David E. Lazovsky ,  Sandra G. Malhotra ,  Thomas R. Boussie

    发明人： David E. Lazovsky ,  Sandra G. Malhotra ,  Thomas R. Boussie

    IPC分类号： H01L23/538

    CPC分类号： H01L21/7685 ,  B82Y30/00 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/288 ,  H01L21/31 ,  H01L21/76834

    摘要： Devices are presented including: a substrate including a dielectric region and a conductive region; a molecular self-assembled layer selectively formed on the dielectric region; and a capping layer formed on the conductive region, where the capping layer is an electrically conductive material such as: an alloy of cobalt and boron material, an alloy of cobalt, tungsten, and phosphorous material, an alloy of nickel, molybdenum, and phosphorous. In some embodiments, devices are presented where the molecular self-assembled layer includes one or more of a polyelectrolyte, a dendrimer, a hyper-branched polymer, a polymer brush, a block co-polymer, and a silane-based material where the silane-based material includes one or more hydrolysable substituents of a general formula RnSiX4-n, where R is: an alkyl, a substituted alkyl, a fluoroalkyl, an aryl, a substituted aryl, and a fluoroaryl, and where X is: a halo, an alkoxy, an aryloxy, an amino, an octadecyltrichlorosilane, and an aminopropyltrimethoxysilane.

    摘要翻译： 本发明提供了包括：包括电介质区域和导电区域的衬底; 选择性地形成在电介质区域上的分子自组装层; 以及形成在导电区域上的覆盖层，其中覆盖层是导电材料，例如钴和硼材料的合金，钴，钨和磷材料的合金，镍，钼和磷的合金 。 在一些实施方案中，存在装置，其中分子自组装层包括聚电解质，树枝状聚合物，超支化聚合物，聚合物刷，嵌段共聚物和硅烷基材料中的一种或多种，​​其中硅烷 基材料包括一个或多个通式为R x Si x 4-n N的可水解取代基，其中R是：烷基，取代的烷基，氟代烷基，芳基 取代的芳基和氟代芳基，其中X为：卤素，烷氧基，芳氧基，氨基，十八烷基三氯硅烷和氨基丙基三甲氧基硅烷。

    Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region
    10.
    发明授权
    Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region 有权
    在电介质区域上形成掩模层，以便在由电介质区域分隔的导电区域上形成覆盖层

    公开(公告)号：US07390739B2

    公开(公告)日：2008-06-24

    申请号：US11132817

    申请日：2005-05-18

    申请人： David E. Lazovsky ,  Sandra G. Malhotra ,  Thomas R. Boussie

    发明人： David E. Lazovsky ,  Sandra G. Malhotra ,  Thomas R. Boussie

    IPC分类号： H01L21/44

    CPC分类号： H01L21/7685 ,  B82Y30/00 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02203 ,  H01L21/288 ,  H01L21/31 ,  H01L21/76834

    摘要： A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case (particularly in the latter), capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, such as silane-based SAMs, can be used to form the masking layer. The capping layer can be formed of an electrically conductive material (e.g., a cobalt alloy, a nickel alloy, tungsten, tantalum, tantalum nitride), a semiconductor material, or an electrically insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.

    摘要翻译： 在电子器件的电介质区域上形成掩模层，使得在随后在由电介质区域分离的电子器件的导电区域上形成覆盖层时，掩模层阻止在其上形成覆盖层材料 在电介质区域。 可以选择性地在导电区域或非选择性地形成覆盖层; 在任一情况下（特别是在后者中），可以随后去除在电介质区域上形成的覆盖层材料，从而确保覆盖层材料仅在导电区域上形成。 可以使用诸如硅烷基SAM之类的硅烷基材料来形成掩模层。 覆盖层可以由导电材料（例如，钴合金，镍合金，钨，钽，氮化钽），半导体材料或电绝缘材料形成，并且可以使用任何适当的工艺形成，包括 常规沉积工艺如无电沉积，化学气相沉积，物理气相沉积或原子层沉积。