ELECTROSTATIC DISCHARGE GUARD RING WITH SNAPBACK PROTECTION

    公开(公告)号:US20210143145A1

    公开(公告)日:2021-05-13

    申请号:US17123413

    申请日:2020-12-16

    摘要: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

    ELECTROSTATIC DISCHARGE GUARD RING WITH SNAPBACK PROTECTION

    公开(公告)号:US20200075576A1

    公开(公告)日:2020-03-05

    申请号:US16677044

    申请日:2019-11-07

    摘要: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

    High voltage lateral junction diode device

    公开(公告)号:US10559681B2

    公开(公告)日:2020-02-11

    申请号:US15850854

    申请日:2017-12-21

    摘要: A lateral junction diode device includes a substrate having at least a semiconductor surface layer. A depletion-mode LDMOS device is in the semiconductor surface layer including a source, drain, and a gate above a gate dielectric, and a channel region under the gate on the gate dielectric. A drift region is between the channel region and the drain, wherein the drain also provides a cathode for the lateral junction diode device. An embedded diode includes a second cathode and an anode that is shared with the device. The embedded diode is junction isolated by an isolation region located between the anode and the source. The anode and isolation region are directly connected to the gate and the second cathode is directly connected to the source.

    FIELD PLATE ARRANGEMENT FOR TRENCH GATE FET

    公开(公告)号:US20230087151A1

    公开(公告)日:2023-03-23

    申请号:US17502692

    申请日:2021-10-15

    IPC分类号: H01L29/40 H01L29/78 H01L29/66

    摘要: A trench gate metal oxide semiconductor (MOSFET) device includes a substrate with a semiconductor surface layer doped a first conductivity type. At least one trench gate MOSFET cell is located in or over the semiconductor surface layer, and includes a body region in the semiconductor surface layer doped a second conductivity type, and a source region on top of the body region doped the first conductivity type. A trench extends down from a top side of the semiconductor surface layer, the trench abutting the body region and being lined with a dielectric material. A field plate that includes polysilicon is located in the trench, and a gate electrode is located over the field plate. The field plate has a bottom portion, a middle portion, and a top portion, wherein the bottom portion is narrower than the middle portion, and the middle portion is narrower than the top portion.