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公开(公告)号：US20200059152A1
公开(公告)日：2020-02-20
申请号：US16662681
申请日：2019-10-24
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L−H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H−L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.
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公开(公告)号：US20190020277A1
公开(公告)日：2019-01-17
申请号：US15883896
申请日：2018-01-30
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： A power converter circuit includes a power stage comprising a transformer and a power switch. The power switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node having a switching voltage between the power switch and the primary winding. A switching controller includes a control transistor device to initiate an operational voltage associated with the control transistor device during a startup mode of the power converter circuit and to provide a control voltage based on an amplitude of the switching voltage during a normal operating mode. The switching controller generates the PWM signal in response to comparing the control voltage and a predetermined switching threshold voltage.
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公开(公告)号：US20190165681A1
公开(公告)日：2019-05-30
申请号：US16160697
申请日：2018-10-15
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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公开(公告)号：US11005355B2
公开(公告)日：2021-05-11
申请号：US16662681
申请日：2019-10-24
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L-H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H-L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.
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公开(公告)号：US10886846B2
公开(公告)日：2021-01-05
申请号：US15883896
申请日：2018-01-30
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： A power converter circuit includes a power stage comprising a transformer and a power switch. The power switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node having a switching voltage between the power switch and the primary winding. A switching controller includes a control transistor device to initiate an operational voltage associated with the control transistor device during a startup mode of the power converter circuit and to provide a control voltage based on an amplitude of the switching voltage during a normal operating mode. The switching controller generates the PWM signal in response to comparing the control voltage and a predetermined switching threshold voltage.
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公开(公告)号：US20200219872A1
公开(公告)日：2020-07-09
申请号：US16240356
申请日：2019-01-04
发明人： Sunglyong Kim , Richard Lee Valley , Tobin Daniel Hagan , Michael Ryan Hanschke , Seetharaman Sridhar
IPC分类号： H01L27/07 , H01L49/02 , H01L29/78 , H01L29/16 , H01L21/8238
摘要： Described examples include a semiconductor device having a resistor. The resistor includes a first terminal and a second terminal. The resistor also includes a first resistive element over an insulating layer over a substrate having a first end coupled to the first terminal of the resistor and a second end coupled to the second terminal of the resistor; and a parallel second resistive element over the insulating layer over the substrate having a first end coupled to the first terminal of the resistor and a second end coupled to the second terminal of the resistor. The resistor may also be coupled in series with another resistor.
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公开(公告)号：US09985534B2
公开(公告)日：2018-05-29
申请号：US15414420
申请日：2017-01-24
CPC分类号： H02M3/33507 , H02M2001/0019 , H02M2001/0032 , Y02B70/16
摘要： Methods of operating switching power supplies are disclosed. A power supply has a transformer and a switch coupled to the primary side of the transformer for controlling the current flow through the primary side of the transformer. A method includes determining the output voltage of the power supply. A first minimum switching frequency is generated for driving the switch in response to the output voltage being greater than a nominal output voltage and less than a predetermined voltage. A second minimum switching frequency is generated for driving the switch in response to the output voltage being equal to or greater than the predetermined voltage, wherein the first minimum switching frequency is greater than the second minimum switching frequency.
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公开(公告)号：US11201603B2
公开(公告)日：2021-12-14
申请号：US16905469
申请日：2020-06-18
摘要： In some examples, a circuit includes an input circuit, an output circuit, an auxiliary circuit, and a balancing circuit. The input circuit comprises a primary capacitor coupled to primary windings of a transformer. The output circuit comprises a secondary capacitor coupled to secondary windings of the transformer, wherein the secondary windings are coupled to the primary windings. The auxiliary circuit comprises auxiliary windings coupled to the primary windings. The balancing circuit is coupled to the output circuit, the auxiliary circuit, and the input circuit. The balancing circuit is configured to balance a voltage across the primary capacitor with a voltage across the secondary capacitor.
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公开(公告)号：US10862397B2
公开(公告)日：2020-12-08
申请号：US16160697
申请日：2018-10-15
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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公开(公告)号：US10135341B1
公开(公告)日：2018-11-20
申请号：US15853205
申请日：2017-12-22
发明人： Pei-Hsin Liu , Richard Lee Valley
摘要： A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.
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